• Title/Summary/Keyword: Dual-path

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The Control of Flexible Beam using Nonlinear Compensator with Dual-Input Describing Function (쌍입력 기술함수를 갖는 비선형 보상기를 이용한 유연한 빔의 제어)

  • 권세현;이형기;최부귀
    • Journal of Institute of Control, Robotics and Systems
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    • v.4 no.5
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    • pp.644-650
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    • 1998
  • In this paper , a state space model for flexible beam is presented using the assumed-modes approach. The state space equation is derived for a flexible beam in which one end is connected to a motor and is driven by a torque equation and the other end is free. Many of the transfer function proposed thus far use the torque to the flexible beam as the input and the tip deflection of the flexible beam as the output. The Technique for the analysis and synthesis of the dual-input describing function(DIDF) is introduced here and the construction of a non-linear compensator, based on this technique, is proposed. This non-linear compensator, properly connected in the direct path of a closed-loop linear or non-linear control system. The above non-linear network is used to compensate linear and non-linear systems for instability, limit cycles, low speed of response and static accuracy. The effectiveness of the proposed scheme is demonstrated through computer simulation and experimental results.

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Design of a Size-reduced RFID Dual-UHF-Band Reader Antenna (RFID 이중 UHF 대역 인식 시스템용 안테나 소형화 설계)

  • Kahng, Sungtek;Kim, Hyeong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.12
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    • pp.1719-1724
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    • 2013
  • In this paper, a size-reduction technique is presented for the RFID reader antenna working at two UHF bands. To tackle the problem of size increase in multi-band applications, two resonance paths are made to occur in one geometry with a single feed. While one resonance path is combined with the other, the entire geometry is determined to guarantee the resonance at the target frequencies through the dual-band input impedance matching. The antenna performance is predicted by the full-wave simulation, and the design method is verified by observing the good agreement between the simulated and measured results. At the two frequencies, the satisfactory return loss as well as the antenna efficiency and peak gain of the far-field pattern is obtained.

A Qualitative Study on Dual-earner Couples' Work-life Balance (맞벌이 가정, 삶의 경로와 조정방식에 대한 질적 연구)

  • Kim, Seonmi
    • Journal of Family Resource Management and Policy Review
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    • v.17 no.2
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    • pp.219-241
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    • 2013
  • The study explored the work-life balance of three dual-earning couples using the household economics approach according to the hermeneutics paradigm. Three families were analysed. The couples were interviewed individually with a non-structural interview guide about their work history and life history, and with a semi-structured interview and structured questionnaire about their work hours, childcare practice, husband-wife relation, household income and expenditure, and daily and weekly schedule. The results revealed the different paths and various strategies to adjust work-life balance among the cases. Strategies were discussed to facilitate changes in labor market policy, childcare policy, working place culture and family's daily life planning.

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Laser Scanning Path Generation for the Fabrication of Large Size Shape

  • Choi, Kyung-Hyun;Choi, Jae-Won;Doh, Yang-Hoe;Kim, Dong-Soo
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.2175-2178
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    • 2005
  • Selective Laser Sintering(SLS) method is one of Rapid Prototyping(RP) technologies. It has been used to fabricate desirable part to sinter powder and stack the fabricated layer. Since the sintering process occurs using infrared laser having high thermal energy, shrinkage and curling of the fabricated part occurs according to thermal distribution. Therefore, the fast scanning path generation is necessary to eliminate the factors of quality deterioration. In case of fabricating larger size parts, the unique scanning device and scanning path generation should be considered. In this paper, the development of SLS machines being capable of large size fabrication(800${\times}$1000${\times}$800 mm, W${\times}$D${\times}$H) will be addressed. The dual laser system and the unique scanning device have been designed and built, which employ CO2 lasers and dynamic 3-axis scanners. The developed system allows scanning a larger planar surface with the desired laser spot size. Also, to generate the fast scanning paths, adaptive path generation is needed with respect to the shape of each layer, and not simply x, y scanning, but the scanning of arbitrary direction should be enabled. To evaluate the suggested method, the complex part will be used for the experiment fabrication.

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A Study on New Algorithm for K Shortest Paths Problem (복수최단경로의 새로운 해법 연구)

  • Chang ByungMan
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2002.05a
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    • pp.8-14
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    • 2002
  • This article presents a new algorithm for the K Shortest Paths Problem which develops initial K shortest paths, and repeal to expose hidden shortest paths with dual approach and to replace the longest path in the present K paths. The initial solution which comprises K shortest paths among shortest paths to traverse each arc is made from bidirectional Dijkstra algorithm. When a crossing node that have two or more inward arcs is found at least three time by turns in this K shortest paths, one inward arc of this crossing node, which has minimum detouring distance, is chosen, and a new path is exposed with joining a detouring subpath from source to this inward arc and a spur of a feasible path from this crossing node to sink. This algorithm, requires worst case time complexity of $O(Kn^2),\;and\;O(n^2)$ in the case $K{\leq}3$.

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An FPGA Implementation of High-Speed Flexible 27-Mbps 8-StateTurbo Decoder

  • Choi, Duk-Gun;Kim, Min-Hyuk;Jeong, Jin-Hee;Jung, Ji-Won;Bae, Jong-Tae;Choi, Seok-Soon;Yun, Young
    • ETRI Journal
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    • v.29 no.3
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    • pp.363-370
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    • 2007
  • In this paper, we propose a flexible turbo decoding algorithm for a high order modulation scheme that uses a standard half-rate turbo decoder designed for binary quadrature phase-shift keying (B/QPSK) modulation. A transformation applied to the incoming I-channel and Q-channel symbols allows the use of an off-the-shelf B/QPSK turbo decoder without any modifications. Iterative codes such as turbo codes process the received symbols recursively to improve performance. As the number of iterations increases, the execution time and power consumption also increase. The proposed algorithm reduces the latency and power consumption by combination of the radix-4, dual-path processing, parallel decoding, and early-stop algorithms. We implement the proposed scheme on a field-programmable gate array and compare its decoding speed with that of a conventional decoder. The results show that the proposed flexible decoding algorithm is 6.4 times faster than the conventional scheme.

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Progressive collapse analysis of buildings with concentric and eccentric braced frames

  • Larijan, Reza Jalali;Nasserabadi, Heydar Dashti;Aghayan, Iman
    • Structural Engineering and Mechanics
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    • v.61 no.6
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    • pp.755-763
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    • 2017
  • In this study, the susceptibility of different symmetric steel buildings with dual frame system to Progressive Collapse (PC) was assessed. Some ten-story dual frame systems with different type of braced frames (concentrically and eccentrically braced frames) were considered. In addition, numbers and locations of braced bays were investigated (two and three braced bays in exterior frames) to quantitatively find out its effect on PC resistance. An Alternate Path Method (APM) with a linear static analysis was carried out based on General Services Administration (GSA 2003) guidelines. Maximum Demand Capacity Ratio (DCR) for the elements (beams and columns) with highest DCRs ($DCR_{moment}$ and $DCR_{shear}$) is given in tables. The results showed that the three braced bays with concentric braced frames especially X-braced and inverted V-braced frame systems had a lower susceptibility and greater resistance to PC. Also, the results represented that the beams were more critical than columns against PC after the removal of column.

Use of Immersive Virtual Technology in Consumer Retailing and Its Effects to Consumer

  • LEE, Won-Jun
    • Journal of Distribution Science
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    • v.18 no.2
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    • pp.5-15
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    • 2020
  • Purpose : Today's retailers are integrating new VR technology into their new marketing strategies. Thus, this research aims to understand the role of virtual experiences in the circumstance of sales channels. Research design, data and methodology : Our model hypothesizes that five key factors determine the consumer experience of VR in the virtual retailing context: smartness, vividness, interactivity, playfulness, escape. Information access and flow are mediating variables that connect key drivers and VR satisfaction. Information access and flow then give influence to satisfaction towards VR. Satisfaction serves as a mediator that determines changes in consumer's dual intention: intention to revisit VR and intention to visit the real site. Results : According to the test results, every path except the relationship between information access and satisfaction of VR is accepted as expected at the significance level of 0.05. Conclusions : This research emphasizes the potential importance of VR and continue VR marketing research as an advent research area. Through the dual-path model, this study found that the primary function of VR is information access and flow experience. This result shows that most VR users value emotional benefits rather than rational benefits provided by VR. Finally, the satisfaction of VR can stimulate both the intention to use the VR and the intention to visit real mall.

A Dual-Path Full Wave Voltage Multiplier for passive RFID Tags (수동형 RFID 태그를 위한 전파 이중 경로 전압 체배기)

  • Cho, Jung-Hyun;Kim, Hak-Su;Kim, Shi-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.16-21
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    • 2007
  • A Dual-Path Voltage Multiplier for passive RFID Tags was proposed and fabricated by using a 0.25um CMOS process with additional steps for schottky diodes. The proposed circuit needs only 4 additional diodes, and the area increment compared to conventional one is negligible in multi-stage voltage multipliers. The simulation and measurement results show that the output power capability of proposed multiplier are about two times larger than the conventional half-wave multiplier.

An Area Efficient High Speed FIR Filter Design and Its Applications (면적 절약형 고속 FIR 필터의 설계 및 응용)

  • Lee, Kwang-Hyun;Rim, Chong-Suck
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.11
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    • pp.85-95
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    • 2000
  • FIR digital filter is one of important blocks in DSP application. For more effective operation, lots of architecture are proposed. In our paper, we proposed a high speed FIR filter with area efficiency. To fast operation, we used transposed form filter as basic architecute. And, we used dual path registers line to wupport variation of filter operation, and filter cascade is also considered. To reduce area, we adopted truncated Booth multiplier to our filter design. As a result, we showed that filter area is reduced when filter optimization using of dual path registers line and truncated multiplier with same constraints againt previous method.

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