• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.6
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• pp.62-68
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• 1983

We suggest a Quasi- dual graph model in consideration of dynamic module assignment and relocation to assign task optimally to two processors that have different processing abilities. An optimal module partitioning and allocation to minimize total processing cost can be achieved by applying shortest-path algorithm with time complexity 0(n2) on this graph model.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.4
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• pp.18-26
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• 1996

In this paper we propose a new dual structured tap selection algorithm for voice echo canceller in digital cellular communication system, investigating adaptive filtering algorithms for echo cancellation in long distance telephony or mobile communication system. The proposed algorithm has a two-stage processing structure that after a dispersive region in an impulse response of an echo path is found out, the tap coefficients of a short length filter are adjusted adaptively for the region, because the impuse response has a very little portion of the dispersion. Simulation results show that the proposed algorithm with 256 taps gives a performance of convergence speed superior to both full-tap normalized least mean with 256 taps gives a performance of convergence speed superior to both full-tap normalized least mean square (NLMS) and a scrub taps waiting in a queue (STWQ) algorithms by about eighty per cent, also to a tap selection algorithm by about twenty per cent. And the resutls diplay that if the more tap coefficients are used due to a long delayed dispersive zone, the proposed algorithm produces the better performance.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.8 no.6
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• pp.78-83
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• 1999

This study discusses a non-contact optical technique, electronic speckle pattern interformetry(ESPI), that is well suited for in-plane and out-of-plane deformation measurement. However, the existing ESPI methods that are based on dual-exposure, real-time and time-average method have difficulties for accurate measurement of structure, due to irregular intensity and shake of phase. Therefore, phase shifting method has been proposed in order to solve this problem. About the method, the path of reference light in interferometry is shifted and added to least square fitting method to make the improvement in distinction and precision. This proposed method is applied to measure in -plane displacement that is compared with the previous method. Also, Used as specimen AS4/PE따 [30/=30/90]s was analyzed by ESPI based on real-time to determine the characteristics of vibration under no-load and tension. These results are quantitatively compared with those of FEM analysis inmode shapes.

• The Transactions of the Korea Information Processing Society
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• v.7 no.1
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• pp.245-251
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• 2000

파이프라인 프로세서를 위한 이중 경로 전략의 성능을 개선하기 위해, 본 논문에서는 통합 신뢰 매커지즘과 적극적 이중경로 전략(EDPS)을 제안한다. 통합 신뢰 매커니즘은 동적 신뢰 매커니즘과 정적 신뢰 매커니즘을 결합한 것으로 기존의 신뢰 매커니즘보다 신뢰 예측 정확도를 높일 수 있고 제안하는 EDPS와 결합하여 사용한다. EDPS는 높은 신뢰 집합에 g속하는 분기 명령어도 가능한 경우에는 두 경로를 모두 사용하여 조건 분기 명령어로 인해 발생하는 분기 지연의 총합을 줄일 수 있다. 6개 벤치마크에 대한 추적 기반의 시뮬레이션을 통해, 제안된 통합 신뢰 매커니즘을 사용하는 EDPS가 기존의 선택적 이중 경로 실행에 비해 분기 지연의 총합을 22%을 줄일 수 있다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.411-421
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• 2002

In this paper, we present a new survivor path memory management method and a dedicated hardware architecture for the design of high-speed Viterbi decoders in modern digital communication systems. In the proposed method, a novel use of k-starting node number deciding circuits enables to acheive the immediate traceback of the merged survivor path from which we can decode output bits, and results in smaller survivor path memory size and processing delay time than the previously known methods. Also, in the proposed method, the survivor path memory can be constructed with ease using a simple standard dual-ported memory since one read-pointer and one write-pointer, that are updated at the same rate, are required for managing the survivor path: the previously known algorithms require either complex k-ported memory structure or k-times faster read capability than write. With a moderate hardware cost for immediate traceback capability the proposed method is superior to the previously known methods for high-speed Viterbi decoding.

• Transactions of Materials Processing
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• v.17 no.7
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• pp.517-522
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• 2008

A visco-plastic self-consistent (VPSC) polycrystal model has been applied to simulate texture simulation and anisotropic properties of DP steels during deep drawing process. In order to evaluate the strain path during deep drawing, a steady state was assumed in the flange part of deep drawn cup. The final stable orientations were strongly dependent on the initial location in the blank. The evolution of anisotropy of DP steel sheets has been demonstrated through comparison of plastic strain rate vector at the different plastic strain levels.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1403-1410
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• 1997

Because streaming mode connection server suitable to wide area ATM networks performs transmission, reception and lookup with time restriction for the transmission time of a cell, it has demerits of large cell loss incase that burst traffic occurs. Therefore, in this paper to decrease cell loss we propose a high speed CAM (Content Addressable Memory) which is capable of processing data of streaming mode connections server at a high speed. the proposed CAM is applied to forwarding table VPC map which performs function to output connection numbers about input VPI(Virtual Path Identifier)/VCI(Virtual Channel Identifier). The designed high speed CAM consist of DBL(Dual Bit Line) CAM structure performed independently write operation and match operation and two-port SRAM structure. Also, its simulation verification and full-custom layout is performed by Hspice and Composs tools in 0.8 .$\mu$m design rule.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.11b
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• pp.713-716
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• 2003

현재 국내 LBS 가 중요한 서비스로 널리 확산되기 위해서는 서비스간의 상호운용성이 제공되어야 한다. 본 논문에서는 LBS 서비스간 상호운용성을 제공하는 개방형 LBS 를 위한 경로탐색 서비스에 대한 설계 및 구현기법을 제시한다. 최단경로문제(Shortest Path Problem)는 통신망 및 교통망의 분석, 생산라인의 품질 관리 등의 다양한 분야 등의 네트워크 흐름 최적화 문제 중에서 가장 많이 연구되고 있는 문제다. 도로 교통망에서는 교차로상에서의 회전 제약 문제 등의 제한조건이 존재한다. 본 논문에서 경로탐색은 듀얼 그래프(dual graph)를 이용하여 회전제약조건을 만족하는 경로를 구할 수 있었고, 사용자 경로탐색 기준에 따른 탐색기법도 제시한다. 또한, 구현된 서비스는OpenLS의 표준화된 인터페이스를 구현하여 상호운용성(interoperability)을 지원하며, 자바를 이용한 웹서비스로 구현되어 이식성, 운영체제 및 프로그래밍 언어 독립성을 제공할 수 있는 장점이 있다.

• The KIPS Transactions:PartA
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• v.11A no.1
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• pp.49-56
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• 2004

The performance of the multiprocessor systems is limited by the several factors. The system performance is affected by the processor speed, memory delay, and interconnection network bandwidth/latency. By the evolution of semiconductor technology, off the shelf microprocessor speed breaks beyond GHz, and the processors can be scalable up to multiprocessor system by connecting through the interconnection networks. In this situation, the system performances are bound by the latencies and the bandwidth of the interconnection networks. SCI, Myrinet, and Gigabit Ethernet are widely adopted as a high-speed interconnection network links for the high performance cluster systems. Performance improvement of the interconnection network can be achieved by the bandwidth extension and the latency minimization. Speed up of the operation clock speed is a simple way to accomplish the bandwidth and latency betterment, while its physical distance makes the difficulties to attain the high frequency clock. Hence the system performance and scalability suffered from the interconnection network limitation. Duplicating the link of the interconnection network is one of the solutions to resolve the bottleneck of the scalable systems. Dual-ring SCI link structure is an example of the interconnection network improvement. In this paper, I propose a network topology and a transaction path algorism, which optimize the latency and the efficiency under the duplicated links. By the simulation results, the proposed structure shows 1.05 to 1.11 times better latency, and exhibits 1.42 to 2.1 times faster execution compared to the dual ring systems.