• 제목/요약/키워드: Dual-Architecture

검색결과 290건 처리시간 0.014초

Analytical Modeling and Simulation for Dual Metal Gate Stack Architecture (DMGSA) Cylindrical/Surrounded Gate MOSFET

  • Ghosh, Pujarini;Haldar, Subhasis;Gupta, R.S.;Gupta, Mridula
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권4호
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    • pp.458-466
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    • 2012
  • A Dual metal gate stack cylindrical/ surrounded gate MOSFET (DMGSA CGT/SGT MOSFET) has been proposed and an analytical model has been developed to examine the impact of this structure in suppressing short channel effects and in enhancing the device performance. It is demonstrated that incorporation of gate stack along with dual metal gate architecture results in improvement in short channel immunity. It is also examined that for DMGSA CGT/SGT the minimum surface potential in the channel reduces, resulting increase in electron velocity and thereby improving the carrier transport efficiency. Furthermore, the device has been analyzed at different bias point for both single material gate stack architecture (SMGSA) and dual material gate stack architecture (DMGSA) and found that DMGSA has superior characteristics as compared to SMGSA devices. The analytical results obtained from the proposed model agree well with the simulated results obtained from 3D ATLAS Device simulator.

무선 통신용 Dual-Modulus Prescaler 위상고정루프(PLL)의 간단한 분주 구조 (Simple Dividing Architecture of Dual-Modulus Prescaler Phase-Locked Loop for Wireless Communication)

  • 김태우;이순섭;최광석;김수원
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.271-274
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    • 1999
  • This paper proposes a simple architecture of digital dividing block in dual-modulus prescaler phase-locked loop used in the wireless communication. Proposed architecture eliminates a swallow counter in the conventional one and demonstrates the advantages in reducing the power consumption and the gate-counts. Therefore, it is suitable for small die area and low power applications. The circuit is designed in a standard 0.35${\mu}{\textrm}{m}$ CMOS process.

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Numerical and Experimental Studies of Dual Subsea Pipelines in Trench

  • Jo, Chul H.;Shin, Young S.;Min, Kyoung H.
    • Journal of Ship and Ocean Technology
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    • 제6권2호
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    • pp.12-22
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    • 2002
  • Offshore pipelines play an important role in the transportation of gas, oil, water and oil products. It is common to have a group of pipelines in the oil and gas field. To reduce the installation cost and time, dual pipelines are designed. There are great advantages in the installation of dual pipelines over two separate single lines. It can greatly reduce the cost for trench, back-filling and installation. However the installation of dual pipelines often requires technical challenges. Pipelines should be placed to be stable against external loadings during installation and design life period. Dual pipelines in trench can reduce the influence of external forces. To investigate the flow patterns and forces as trench depth and slope changes, number of experiments are conducted with PIV(Particle Image Velocimetry) equipment in a Circulating Water Channel. Numerical approaches to simulate experimental conditions are also made to compare with experimental results. The velocity fields around dual pipelines in trench are investigated and analysed. Comparison of both results show similar patterns of flow around pipelines. It is proved that the trench depth contributes significantly on hydrodynamic stability. The trench slope also affects the pipeline stability. The results can be applied in the stability design of dual pipelines in trench section. The complex flow patterns can be effectively linked in the understanding of fluid motions around multi-circular bodies in trench.

가변형 이중 날개를 갖는 수직축 수류터빈에 대한 연구 (Study on Vertical Axis Water Turbine with Movable Dual Blades)

  • 김도형;안병권
    • 한국해양공학회지
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    • 제30권2호
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    • pp.125-133
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    • 2016
  • In this paper, we propose a vertical axis water turbine with dual blades. A parametric study was conducted using numerical analyses. First, a two-dimensional finite-volume analysis with a commercial code was used to find the pitch angle of the main blade under different tip speed ratio conditions. Second, we developed a potential-based panel method to find the best configuration of the inner blades. Experimental tests were conducted at the circulating water channel of Chungnam National University. Various configurations of the dual blades were considered, and their performances were comparatively investigated. The results showed that the turbine with movable dual blades produces a constant torque and tip speed ratio at various flow rates.

이중 링 CC-NUMA 시스템에서 링 구조 변화에 따른 시스템 성능 분석 (Analysis of System Performance of Change the Ring Architecture on Dual Ring CC-NUMA System)

  • 윤주범;장성태;전주식
    • 한국정보과학회논문지:시스템및이론
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    • 제29권2호
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    • pp.105-115
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    • 2002
  • NUMa 구조는 원격 메모리에 대한 접근이 불가피한 구조적 특성 때문에 상호 연결망이 시스템 성능을 좌우하는 큰 변수가 된다. 기존에 대중적으로 사용되던 버스는 물리적 확장성 및 대역폭에서 대규모 시스템을 구성하는데 한계를 보인다. 이를 대체하는 고속의 지점간 링크를 사용한 이중 링구조는 버스가 가지는 확장성 및 대역폭의 한계라는 단점을 개선하였으나, 많은 노드가 연결되는 경우에는 응답 지연시간이 증가하는 문제점을 가지고 있다. 본 논문에서는 스누핑 프로토콜이 적용된 이중 일 구조에서 노드개수 증가에 따른 응답지연시간 증가의 문제점을 보안하기 위해 코달 링 구조로의변화를 제안하고 이 구조에 효과적인 링크 제어기를 설계한다. 또한 확률 구동 시뮬레이터를통해 본 논문을 통해 제시한 코달 링 구조가 시스템의 성능 및 응답시간에 미치는 영향을 알아본다.

효율적인 로그와 지수 연산을 위한 듀얼 페이즈 명령어 구조 (A Efficient Calculation for log and exponent with A Dual Phase Instruction Architecture)

  • 김준서;이광엽;곽재창
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2010년도 춘계학술대회
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    • pp.320-323
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    • 2010
  • 본 논문은 작은 사이즈가 요구되는 제한적인 모바일 환경의 프로세서에서 별도의 연산기 없이 제안된 Dual Phase 명령어 구조를 이용해 효율적인 로그와 지수 연산이 가능한 방법을 제안한다. Floating Point 자료형의 지수부와 실수부를 추출하는 명령어 세트와 테일러 급수 전개를 이용해 로그의 근사치를 계산하여 24비트 단정도 부동 소수점을 연산하고, Dual Phase 명령어 구조를 활용해 명령어 실행 사이클을 줄였다. 제안된 구조는 별도의 연산기를 두는 구조보다 작은 사이즈를 유지하면서 성능저하를 33%까지 최소화 할 수 있는 구조이다.

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이중 커널 구조의 OS를 위한 IEEE1394 디바이스 드라이버의 설계 및 구현 (Design md Implementation of IEEE1394 Device Driver for Dual Kernel OS)

  • 정기훈;오주용;강순주
    • 한국정보과학회논문지:시스템및이론
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    • 제32권3호
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    • pp.107-114
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    • 2005
  • 본 논문에서는 이중 커널 OS인 RTLinux에서 실시간, 비실시간 커널의 응용 프로그램을 동시에 지원하기 위한 IEEE1394 디바이스 드라이버의 구조를 설계 및 구현하였다. 제안한 이중 커널 OS를 위한 디바이스 드라이버는 양 커널의 태스크를 동시에 지원할 수 있는 장점을 가진다 이와 더불어 제안된 디바이스 드라이버는 실시간 커널측의 작업 요청을 우선적으로 처리하도록 구성하여 실시간성 보장이 가능하도록 배려하였다. 이 디바이스 드라이버의 구조는 RTLinux뿐만 아니라 이중 커널 시스템을 위한 디바이스 드라이버 설계에 도움이 될 것이다.

Ferrite-Bainite dual phase 강의 피로균열진전 특성 평가 (A Study of Fatigue Crack Growth Behaviour for Ferrite-Bainite Dual Phase Steel)

  • 김덕근;조동필;오동진;김명현
    • Journal of Welding and Joining
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    • 제34권1호
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    • pp.41-46
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    • 2016
  • With the recent increase in size of ships and offshore structures, there are more demand for thicker plates. As the thickness increases, it is known that fatigue life of the structures decrease. To improve the fatigue life, post weld treatments techniques, such as toe grinding, TIG dressing and hammer peening, are typically employed. However, these techniques require additional construction time and production cost. Therefore, it is of crucial interest steels with longer fatigue crack growth life compared to conventional steels. This study investigates fatigue crack growth rate (FCGR) behaviours of conventional EH36 steel and Ferrite-Bainite dual phase EH36 steel (F-B steel). F-B steel is known to have improved fatigue performance associated with the existence of two different phases. Ferrite-Bainite dual phase microstructures are obtained by special thermo mechanical control process (TMCP). FCGR behaviours are investigated by a series of constant stress-controlled FCGR tests. Considering all test conditions (ambient, low temperature, high stress ratio), it is shown that FCGR of F-B steel is slower than that of conventional EH36 steel. From the tensile tests and impact tests, F-B steel exhibits higher values of strength and impact energy leading to slower FCGR.

Dual EKF-Based State and Parameter Estimator for a LiFePO4 Battery Cell

  • Pavkovic, Danijel;Krznar, Matija;Komljenovic, Ante;Hrgetic, Mario;Zorc, Davor
    • Journal of Power Electronics
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    • 제17권2호
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    • pp.398-410
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    • 2017
  • This work presents the design of a dual extended Kalman filter (EKF) as a state/parameter estimator suitable for adaptive state-of-charge (SoC) estimation of an automotive lithium-iron-phosphate ($LiFePO_4$) cell. The design of both estimators is based on an experimentally identified, lumped-parameter equivalent battery electrical circuit model. In the proposed estimation scheme, the parameter estimator has been used to adapt the SoC EKF-based estimator, which may be sensitive to nonlinear map errors of battery parameters. A suitable weighting scheme has also been proposed to achieve a smooth transition between the parameter estimator-based adaptation and internal model within the SoC estimator. The effectiveness of the proposed SoC and parameter estimators, as well as the combined dual estimator, has been verified through computer simulations on the developed battery model subject to New European Driving Cycle (NEDC) related operating regimes.

An I/O Bus-Based Dual Active Fault Tolerant Architecture fort Good System Performance

  • Kwak, Seung-Uk;Kim, Jeong-Il;Jeong, Keun-Won;Park, Kyong-Bae;Kang, Kyong-In;Kim, Hyen-Uk;Lee, Kwang-Bae
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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    • pp.515-520
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    • 1998
  • In this paper, we propose a new fault tolerant architecture for high availability systems, where for module internal operations both processor modules perform the same tasks at the same time independently of each other while for module external operations both processor modules act actively. That is, operations of synchronization between dual processor modules except clock synchronization are requested only when module external operations are executed. The architecture can not only improve system availability by reducing system reintegration time but also reduce performance degradation problem due to frequent synchronization between dual processor modules. The clock unit consists of a clock generator and a clock synchronization circuit. This supplies a stable clock signal under clock unit disorder of any processor module or rapid clock signal variation. And this architecture achieves system availability and data credibility by designing as symmetrical form.

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