• Title/Summary/Keyword: Dual Time Delay

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Direct Time-domain Phase Correction of Dual-comb Interferograms for Comb-resolved Spectroscopy

  • Lee, Joohyung
    • Current Optics and Photonics
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    • v.5 no.3
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    • pp.289-297
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    • 2021
  • We describe a comb-mode resolving spectroscopic technique by direct time-domain phase correction of unstable interferograms obtained from loosely locked two femtosecond lasers. A low-cost continuous wave laser and conventional repetition rate stabilization method were exploited for locking carrier and envelope phase of interferograms, respectively. We intentionally set the servo control at low bandwidth, resulting in severe interferograms' fluctuation to demonstrate the capability of the proposed correction method. The envelope phase of each interferogram was estimated by a quadratic fit of carrier peaks to correct timing fluctuation of interferograms in the time domain. After envelope phase correction on individual interferograms, we successfully demonstrated 1 Hz linewidth of RF comb-mode over 200 GHz optical spectral-bandwidth with 10-times signal-to-noise ratio (SNR) enhancement compared to the spectrum without correction. Besides, the group delay difference between two femtosecond pulses is successfully estimated through a linear slope of phase information.

A Digital DLL with 4-Cycle Lock Time and 1/4 NAND-Delay Accuracy

  • Kim, Sung-Yong;Jin, Xuefan;Chun, Jung-Hoon;Kwon, Kee-Won
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.387-394
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    • 2016
  • This paper presents a fully digital delay locked loop (DLL) that can acquire lock in four clock cycles with a resolution of a 1/4 NAND-delay. The proposed DLL with a multi-dither-free phase detector acquires the initial lock in four clock cycles with 1/2 NAND-delay. Then, it utilizes a multi-dither-free phase detector, a region accumulator, and phase blenders, to improve the resolution to a 1/4 NAND-delay. The region accumulator which continuously steers the control registers and the phase blender, adaptively controls the tracking bandwidth depending on the amount of jitter, and effectively suppresses the dithering jitter. Fabricated in a 65 nm CMOS process, the proposed DLL occupies $0.0432mm^2$, and consumes 3.7 mW from a 1.2-V supply at 2 GHz.

A Highly Expandable Forwarded-Clock Receiver with Ultra-Slim Data Lane using Skew Calibration by Multi-Phase Edge Monitoring

  • Yoo, Byoung-Joo;Song, Ho-Young;Chi, Han-Kyu;Bae, Woo-Rham;Jeong, Deog-Kyoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.4
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    • pp.433-448
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    • 2012
  • A source-synchronous receiver based on a delay-locked loop is presented. It employs a shared global calibration control between channels, yet achieves channel expandability for high aggregate I/O bandwidth. The global calibration control accomplishes skew calibration, equalizer adaptation, and phase lock of all the channels in a calibration period, resulting in the reduced hardware overhead and area of each data lane. In addition, the weight-adjusted dual-interpolating delay cell, which is used in the multiphase DLL, guarantees sufficient phase linearity without using dummy delay cells, while offering a high-frequency operation. The proposed receiver is designed in the 90-nm CMOS technology, and achieves error-free eye openings of more than 0.5 UI across 9-28 inch Nelco4000-6 microstrips at 4-7 Gb/s and more than 0.42 UI at data rates of up to 9 Gb/s. The data lane occupies only $0.152mm^2$ and consumes 69.8 mW, while the rest of the receiver occupies $0.297mm^2$ and consumes 56.0 mW at the 7- Gb/s data-rate and supply voltage of 1.35 V.

A Wide - Range Dual-Loop DLL with Programmable Skew - Calibration Circuitry for Post Package (패키지후 프로그램을 이용 스큐 수정이 가능한 광범위한 잠금 범위를 가지고 있는 이중 연산 DLL 회로)

  • Choi, Sung-Il;Moon, Gyu;Wee, Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.6
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    • pp.408-420
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    • 2003
  • This paper describes a Delay Locked Loop (DLL) circuit having two advancements : 1) a dual loop operation for a wide lock-range and 2) programmable replica delays using antifuse circuitry and internal voltage generator for a post-package skew calibration. The dual loop operation uses information from the initial time-difference between reference clock and internal clock to select one of the differential internal loops. This increases the lock-range of the DLL to the lower frequency. In addition, incorporation with the programmable replica delay using antifuse circuitry and internal voltage generator allows for the elimination of skews between external clock and internal clock that occur from on and off-chip variations after the package process. The proposed DLL, fabricated on 0.16m process, operates over the wide range of 42MHz - 400MHz with 2.3v power supply. The measured results show 43psec peak-to-peak jitter and 4.71psec ms jitter consuming 52㎽ at 400MHz.

A Study on the Design of Ship's Distributed Remote Control System Using Dual-Microprocessor (이중마이크로프로세서의 이용과 분산처리기법을 도입한 선박용 원격제어 시스템의 설계에 관한 연구)

  • 홍순철;정경열;류길수
    • Journal of Advanced Marine Engineering and Technology
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    • v.18 no.5
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    • pp.78-87
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    • 1994
  • In this paper design and implementation of ship's distributed remote control system using dual-microprocessor is presented for real time process. The proposed system is implemented with the single chip microprocessors in tightly coupled mode and results in speed up of $s_p$=1.74. Under the assumption that the nodes are interconnected in multidrop, the overall system performance such as average throughout-delay characteristics and effective throughput are analyzed using M/G/1 queneing model, and results show that the proposed node can be used in medium sized distributed monitoring and control system.

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Frequency range expansion of pneumatic exciter by using dual-chamber (이중챔버를 이용한 공압 가진기의 주파수 범위 확장)

  • Park, Young-woo;Kim, Kwang-joon
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2013.10a
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    • pp.815-824
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    • 2013
  • Pneumatic exciters can be good replacements of electrodynamic, piezoelectric and hydraulic exciters owing to simple structure and large exciting force. One problem to be solved is a slow response caused by compressibility of air. Desirable frequency response characteristics of exciter are constant magnitude and zero degree phase, because users want no time delay between input signal and output force. For this reason, frequency range of pneumatic exciters is limited about 0~1 Hz. Therefore, expansion of frequency range is an important issue when designing the pneumatic exciter. In this paper, the pneumatic exciter which has same structure with active pneumatic isolator is dealt with. The dynamic characteristics are presented, and its limitation of expanding frequency range is shown based on analytical studies. Then the pneumatic exciter with dual-chamber is suggested to overcome this problem. Based on simulation study, a design method is presented.

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Combustion/Shock Interactions in a Dual-Mode Scramjet Engine (이중모드 스크램제트 엔진에서 연소와 충격파의 상호작용)

  • Choi, Jeong-Yeol;Noh, Jin-Hyeon;Byun, Jong-Ryul
    • Proceedings of the Korean Society of Propulsion Engineers Conference
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    • 2011.04a
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    • pp.367-370
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    • 2011
  • A high-resolution numerical study is carried out to investigate the transient process of the combustion and the shock-train developments in an ethylene-fueled direct-connect dual-mode scramjet combustor. Air-throttling is then applied at the expansion part of the combustor to provide mass addition to block the flow to subsonic speed, hence to enhance the fuel-air mixing and ignition. Present simulation shows the detailed results for the better understanding of transient processes of the operation regimes in the dual-mode scramjet combustor.

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Implementation of Dual-Kernel based Control System and Evaluation of Real-time Control Performance for Intelligent Robots (지능형 로봇을 위한 이중 커널 구조의 제어 시스템 구현 및 실시간 제어 성능 분석)

  • Park, Jeong-Ho;Yi, Soo-Yeong;Choi, Byoung-Wook
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.11
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    • pp.1117-1123
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    • 2008
  • This paper implements dual-kernel system using standard Linux and real-time embedded Linux for the real-time control of intelligent robot systems. Such system provides more useful services including standard Linux thread that is easy to implement complicated tasks and real-time tasks for the deterministic response to velocity control. Here, an open source real-time embedded Linux, XENOMAI, is ported on embedded target board. And for interfacing with motor controller we adopted a real-time serial device driver. The real-time task was implemented with a priority to keep the cyclic control command for trajectory control. In order to validate deterministic response of the proposed system, the performance measurement of the delay in performing trajectory control with feedback loop is evaluated with non real-time standard Linux. The proposed software architecture is anticipated to take advantage of features in both standard Linux and real-time operating systems for the intelligent robot systems.

Control of Decoupled Type High Precision Dual-Servo (Decoupled Type의 초정밀 이중 서보의 제어에 관한 연구)

  • Nam Byoung-Uk;Kim Ki-Hyun;Choi Young-Man;Kim Jung-Jae;Lee Suk-Won;Gweon Dae-Gab
    • Journal of the Korean Society for Precision Engineering
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    • v.23 no.2 s.179
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    • pp.43-50
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    • 2006
  • Recently, with rapid development of semiconductor and flat panel display, the manufacturing equipments are required to have large travel range, high productivity, and high accuracy. In this paper, an ultra precision decoupled dual servo (DDS) system is proposed to meet these requirements. And a control scheme for the DDS is studied. The proposed DDS consists of a $XY{\Theta}$ fine stage for handling work-pieces precisely and a XY coarse stage for large travel range. The fine stage consists of four voice coil motors (VCM) and air bearing guides. The coarse stage consists of linear motors and air bearing guides. The DDS is mechanically decoupled between coarse stage and fine stage. Therefore, both stages must be controlled independently and the performance of the DDS is mainly determined by the fine stage. For high performance tracking, the controller of fine stage consists of time delay control (TDC) and perturbation observer while the controller of coarse stage is TDC alone. With these individual controllers, two kinds of dual-servo control strategies are suggested: master-slave type and parallel type. By simulations and experiments, the performances of two dual-servo control strategies are compared.

A Study on Optimization of Lane-Use and Traffic Signal Timing at a Signalized Intersection (신호교차로의 차로 배정과 신호시간 최적화 모형에 관한 연구)

  • Kim, Ju Hyun;Shin, Eon Kyo
    • International Journal of Highway Engineering
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    • v.17 no.5
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    • pp.93-103
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    • 2015
  • PURPOSES : The purpose of this study is to present a linear programing optimization model for the design of lane-based lane-uses and signal timings for an isolated intersection. METHODS: For the optimization model, a set of constraints for lane-uses and signal settings are identified to ensure feasibility and safety of traffic flow. Three types of objective functions are introduced for optimizing lane-uses and signal operation, including 1) flow ratio minimization of a dual-ring signal control system, 2) cycle length minimization, and 3) capacity maximization. RESULTS : The three types of model were evaluated in terms of minimizing delay time. From the experimental results, the flow ratio minimization model proved to be more effective in reducing delay time than cycle length minimization and capacity maximization models and provided reasonable cycle lengths located between those of other two models. CONCLUSIONS : It was concluded that the flow ratio minimization objective function is the proper one to implement for lane-uses and signal settings optimization to reduce delay time for signalized intersections.