• Journal of Broadcast Engineering
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• v.25 no.2
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• pp.242-251
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• 2020

Recently, many deep convolutional neural networks for image super-resolution have been studied. Existing deep learning-based super-resolution algorithms are architecture that up-samples the resolution at the end of the network. The post-upsampling architecture has an inefficient structure at large scaling factor result of predicting a lot of information for mapping from low-resolution to high-resolution at once. In this paper, we propose a single image super-resolution using Channel Attention Residual Dense Block based on an iterative up-down sampling architecture. The proposed algorithm efficiently predicts the mapping relationship between low-resolution and high-resolution, and shows up to 0.14dB performance improvement and enhanced subjective image quality compared to the existing algorithm at large scaling factor result.

• Journal of Broadcast Engineering
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• v.14 no.5
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• pp.638-649
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• 2009

Image resizing (or scaling) is one of the most essential issues for the success of visual service because image data has to be adapted to the variety of display features. For 2D imaging, the image scaling is generally accomplished by 2D image re-sampling (i.e., up-/down-sampling). However, when it comes to stereoscopic 3D images, 2D re-sampling methods are inadequate because additional consideration on the third dimension of depth is not incorporated. Practically, stereoscopic 3D image scaling is process with left/right images, not stereoscopic 3D image itself, because the left/right Images are only tangible data. In this paper, we analyze stereoscopic 3D image scaling from two aspects: geometrical deformation and frequency-domain aliasing. A number of 3D displays are available in the market and they have various screen dimensions. As we have more varieties of the displays, efficient stereoscopic 3D image scaling is becoming more emphasized. We present the recommendations for the 3D scaling from the geometric analysis and propose a disparity-adaptive filter for anti-aliasing which could occur during the image scaling process.

• 한국방재학회:학술대회논문집
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• 2011.02a
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• pp.175-175
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• 2011

IDF 곡선은 수리구조물의 설계에 이용되며 본 연구에서는 기후변화를 고려한 GCM의 시간적 공간적 축소화기법을 통하여 미래의 IDF 곡선을 생성하였다. GCM자료로는 HadCM3과 CGCM3의 지역주의와 경제발전을 지향하는 A2시나리오를 이용하였다. GCM자료에 대한 공간적인 축소화기법으로 다중회귀 모형인 SDSM(Statistical DownScaling Model)을 이용하여 2030년, 2050년, 2080년의 미래의 일강우 자료를 생성하였다. 이를 다시 시간적 축소화기법인 GEV분포를 이용한 Scaling-Invariance기법을 적용하여 시단위의 강우자료를 생성하였다. 이를 통해 최종적으로 HadCM3과 CGCM3에 대한 각각 미래의 IDF곡선을 생성하였다. CGCM3의 경우 지속적인 강우강도의 증가를 보였지만 HadCM3의 경우 2050년대 감소하다 2080년대 다시 증가하는 양상을 보였다. 또한 CGCM3의 경우 HadCM3의 경우보다 좀 더 높은 강우 강도를 보였다. 본 연구의 대상지역은 서울지역이며 생성된 자료의 신뢰성을 확보하기위하여 서울기상관측소의 1961년부터~2000년까지의 일단위 강우자료를 이용하여 검 보정을 수행하였다.

• Proceedings of the Korean Society For Composite Materials Conference
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• 2005.11a
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• pp.61-65
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• 2005

Existing test methods for thick-section specimens ( 4mm) have not provided precise compressive properties to date for the analysis and design of thick structure. A survey of the failure behaviour of such thick specimens revealed that the failure initiated at the top corner of the specimen and propagated down and across the width of the specimen as premature failure, not typically reported for thin compression specimens. In the current study, the premature failure was successfully avoided during compressive testing and the failure mode was quite similar regardless of increasing specimen thickness and specimen volume. Failure mode was similar regardless of increasing specimen thickness and specimen volume, i.e. brooming failure mode combined with longitudinal splitting, interlaminar cracking, fibre breakage and kinkband formation (fibre microbuckling). Nevertheless, average failure strengths of the specimens decreased with increasing specimen thicnkiness from 2mm to 8mm with the T800/924C system (36% strength reduction) and specimen volumes from scaling factor I to scaling factor 4 with the IM7/8552 system (46% strength reduction). It was revealed from the literature$^{11}$ that the thickness effect and scaling effect arc caused by manufacturing defects such as void content and fibre waviness.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.11
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• pp.3094-3097
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• 2009

The use of general-purpose divider is inevitable to implement a image down-scaler when an arbitrary scaling ratio is given. To get an output at every clock from the divider, the divider should be implemented by LUT, however, its hardware size will be bigger and bigger as the precision level is increased. In this paper, a new image scaling algorithm is presented for a arbitrary scaling ratio, which do not requires a general-purpose or LUT-based divider. The proposed algorithm utilizes only comparators and adders such that the hardware size can be reduced by 1/10 compared to the conventional approaches.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.1
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• pp.109-114
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• 2002

In this paper, we have presented the simulation results ah)ut threshold voltage for Si-based MOSFETs with channel length of nano scale. We simulated the Si-based n channel MOSFETs with gate lengths from 180 to 30 nm in accordance to the constant voltage scaling theory and the lateral scaling. These MOSFETs had the lightly doped drain(LDD) structure, which is used for the reduction of electric field magnitude and short channel effects at the drain region. The stronger electric field at this region is due to scaling down. We investigated and analyzed the threshold voltage of these devices. This analysis will provide insight into some applicable limitations at the ICs and used for basis data at VLSI.

• Nuclear Engineering and Technology
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• v.56 no.3
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• pp.1037-1051
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• 2024

This paper presents the construction results and design of the UNIST Reactor Innovation platform for small modular reactors as a versatile testbed for exploring innovative technologies. The platform uses simulant fluids to simulate the thermal-hydraulic behavior of a reference small modular reactor design, allowing for cost-effective design modifications. Scaling analysis results for single and two-phase natural circulation flows are outlined based on the three-level scaling methodology. The platform's capability to simulate natural circulation behavior was validated through performance calculations using the 1-D system thermal-hydraulic code-based calculation. The strategies for evaluating cutting-edge technologies, such as the integration of a solid oxide electrolysis cell for hydrogen production into a small modular reactor, are presented. To overcome experimental limitations, the hardware-in-the-loop technique is proposed as an alternative, enabling real-time simulation of physical phenomena that cannot be implemented within the experimental facility's hardware. Overall, the proposed versatile innovation platform is expected to provide valuable insights for advancing research in the field of small modular reactors and nuclear-based hydrogen production.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1379-1382
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• 2003

Recently, mobile embedded systems used widly in various applications. Managing power consumption is becoming a matter of primary concern because those systems use limited power supply. As an approach reduce power consumption, voltage can be scaled down. according to the execution time and deadline. By reducing the supplying voltage to 1/N power consumption can be reduced to 1/N. DPM-S is a well known method for dynamic voltage scaling. In this paper, we enhanced DPM-S by using average execution time aggressively. The frequency of processor is calculated based in average execution time instead of worst case execution time. Simulation results show that our method achieve up to 5％ energy savings than DPM-S.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2015.11a
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• pp.155-155
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• 2015

메모리 반도체의 지속적인 scale down을 위해서는 고유전 산화막을 이용한 등가산화막두께(EOT) 스케일링이 이뤄져야 한다. 특히, DRAM의 커패시터의 경우, EOT scaling을 위한 신 물질 및 공정개발이 지연되면서 전극과 유전체 사이의 계면특성 개선, 또는 기존에 사용하던 물질을 지속적으로 사용할 수 있는 방안에 대한 필요성이 대두되고 있다. 본 발표에서는 DRAM 커패시터 소재 개발이 겪고 있는 어려움에 대해 소개하고 기존에 반도체 라인에서 사용하고 있는 물질들을 조합한 다성분계 산화막을 이용하여 EOT 0.5 nm를 구현하기 위한 연구 결과에 대해 보고한다. 또한 앞으로 지속적인 커패시터 유전체 개발을 위해 관심을 갖고 수행해야 하는 연구에 대해 함께 다룬다.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.13 no.10
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• pp.1025-1033
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• 2001

A scaling analysis is provided which predicts the sliding velocity of a liquid drop down an inclined surface. The analysis is based on the balance of the gravitational work rate that drives the drop sliding and the resistances by capillary and viscous forces. The capillary resistance is accounted for via the contact angle hysteresis, which is quantified by measuring the critical inclination causing the drop to start sliding. The sliding of the drop is governed by the rate of the viscous dissipation of the Stokes flow. The analysis result in its limit form for small contact angles is consistent with previous results. In the experiments to verify the analysis results, the measured sliding velocity of various liquid drops are shown to obey the predictions made in this study.