• Bulletin of the Korean Space Science Society
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• 2010.04a
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• pp.25.1-25.1
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• 2010

This talk outlines the current understanding of solar flares, mainly focusing on magnetohydrodynamic (MHD) processes. A flare causes plasma heating, mass ejection, and particle acceleration that generates high-energy particles. The key physical processes related to a flare are: the emergence of magnetic field from the solar interior to the solar atmosphere (flux emergence), formation of current-concentrated areas (current sheets) in the corona, and magnetic reconnection proceeding in current sheets that causes shock heating, mass ejection, and particle acceleration. A flare starts with the dissipation of electric currents in the corona, followed by various dynamic processes which affect lower atmospheres such as the chromosphere and photosphere. In order to understand the physical mechanism for producing a flare, theoretical modeling has been developed, in which numerical simulation is a strong tool reproducing the time-dependent, nonlinear evolution of plasma before and after the onset of a flare. In this talk we review various models of a flare proposed so far, explaining key features of these models. We show observed properties of flares, and then discuss the processes of energy build-up, release, and transport, all of which are responsible for producing a flare. We come to a concluding view that flares are the manifestation of recovering and ejecting processes of a global magnetic flux tube in the solar atmosphere, which was disrupted via interaction with convective plasma while it was rising through the convection zone.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.4
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• pp.685-695
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• 1997

In this paper, a new CMOS continuous-time fully-differential current-mode integrator is proposed as a basic building block of the low-voltage high frequency current-mode active filter. The proposed integrator is composed of the CMOS complementary circuit which can extend transconductance of an integrator. Therefore, the unity gain frequency which is determined by a small-signal transconductance and a MOSFET gate capacitance can be expanded by the complementary transconductance of the proposed integrator. And also the magnitude of pole and zero are increased. The unity gain frequency of the proposed integrator is increased about two times larger than that of the conventional continuous-time fully-differential integrator with NMOS-gm. These results are verified by the small signal analysis and the SPICE simulation. As an application circuit of the proposed fully-differential current-mode integrator, the three-pole Chebyshev lowpass filter is designed using 0.8.$\mu$m CMOS processing parameters. SPICE simulation predicts a 3-dB bandwidth of 148MHz and power dissipation of 4.3mW/pole for the three-pole filter with 3-V power supply.

• Journal of the Korean Society of Industry Convergence
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• v.24 no.4_1
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• pp.387-395
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• 2021

Distributed resources such as renewable energy sources and ESS are connected to the low voltage direct current(LVDC) distribution network through the power conversion system(PCS). Control power is required for the operation of the PCS. In general, controller power is supplied from AC power or DC power through switch mode power supply(SMPS). However, the conventional SMPS has a low input voltage, so development and research on high input voltage self-power suitable for LVDC is insufficient. In this paper, to develop Self-Power that can be used for LVDC, the characteristics of the conventional topology are analyzed, and a series-input single-output flyback converter using a flux-sharing transformer for high voltage is designed. The high input voltage Self-Power was designed in the DCM(discontinuous current mode) to reduce the switching loss and solve the problem of current dissipation. In addition, since it operates even at low input voltage, it can be applied to many applications as well as LVDC. The validity of the proposed high input voltage self-power is verified through experiments.

• Smart Structures and Systems
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• v.29 no.3
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• pp.457-473
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• 2022

A high-frequency vibration control method is proposed in this paper for Pumped Storage Power Plants (PSPPs) using Eddy Current Tuned Mass Damper (EC-TMD), based on which a new type of EC-TMD device is designed. The eddy current damper parameters are optimized by numerical simulation. On this basis, physical simulation model tests are conducted to compare and study the effect of structural performance with and without damping, different control strategies, and different arrangement positions of TMD. The test results show that EC-TMD can effectively reduce the control effect under high-frequency vibration of the plant structure, and after the additional damping device forms EC-TMD, the energy dissipation is further realized due to the intervention of eddy current damping, and the control effect is subsequently improved. The Multi-Tuned Mass Damper (MTMD) control strategy broadens the tuning band to improve the robustness of the system, and the vibration advantage is more obvious. Also, some suggestions are made for the placement of the dampers to promote their application.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.37-43
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• 2008

This paper introduces a high-speed low-power self-timed current-mode logic (STCML) that reduces both dynamic and leakage power dissipation. STCML significantly reduces the leakage portion of the power consumption using a pulse-mode control for shorting the virtual ground node. The proposed logic style also minimizes the dynamic portion of the power consumption due to short-circuit current by employing an enhanced self-timing buffer. Comparison results using a 80-nm CMOS technology show that STCML achieves 26 times reduction on leakage power consumption and 27% reduction on dynamic power consumption as compared to the conventional current-mode logic. They also indicate that up to 59% reduction on leakage power consumption compared to differential cascode voltage switch logic (DCVS).

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2007.05a
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• pp.353-356
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• 2007

This paper presents the thermal and electrical characteristics of ZnO arrester blocks under the AC voltages. The leakage currents of ZnO arrester blocks were measured as a function of time. The temperature distributions of ZnO arrester blocks were observed by the forward looking infrared camera The degradation and thermal runaway of ZnO arrester blocks were closely related with the temperature limit of ZnO arrester blocks which decided heat generation and dissipation As a result, the degradation and thermal runaway of ZnO arrester blocks depend on the temperature and leakage current of ZnO arrester blocks.

• Transactions of the Korean hydrogen and new energy society
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• v.7 no.1
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• pp.3-9
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• 1996

Hydrogen generation by electrical discharge through metal/water system is a viable method for on-demand applications. But its success depends on high energy efficiency defined as the ratio of the amount of consumed metal for a complete reaction with water to the electrical energy input. To improve the energy efficiency the electrical discharge has to sustain the hydrogen generation reaction with a minimal energy dissipation. Some experimental results on the discharge voltage-current profiles are reported and discussed.

• Journal of Power Electronics
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• v.13 no.5
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• pp.779-786
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• 2013

A highly efficient sustaining driver is proposed for plasma display panels (PDPs). When the PDP is charged and discharged, the proposed sustaining driver employs an address voltage source used in an addressing period. A voltage source is used for fully charging the panel to the sustaining voltage, and an initial inductor current helps the panel discharge to 0 V. The resonance between the panel and an inductor is made by shifting the voltage and current bias level when charging and discharging the panel. As a result, the proposed circuit can reduce power consumption, switching loss, heat dissipation, and production cost. Experimental results of a 42-inch PDP are provided to verify the operation and features of the proposed circuit.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.408-411
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• 2004

The electrical stability against surge stress of ZPCCY-based varistors were investigated at different sintering times. Sintering time decreased the varistor voltage and nonlinear exponent from 279.6 to 179.1 and from 52.5 to 24.9, respectively. On the contrary, the leakage current and dielectric dissipation factor increased from 1.2 to 9.8 ${\mu}A$ and from 0.0461 to 0.0651 with increase of sintering time. For all varistors, the variation rates of V-I characteristic parameters against surge stress were affected in order of varistor voltage$\rightarrow$nonlnear exponent$\rightarrow$leakage current. On the whole, the electrical stability against surge stress increased with increasing sintering time. Conclusively, it is assumed that the varistor sintered for 2 h exhibited comparatively good characteristics, in view of overall characteristics.

• The Magazine of the IEIE
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• v.24 no.6
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• pp.38-49
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• 1997

0.4mm Resign Rule의 Super Low Power Dissipation, Low Voltage. Operation-5- Full CMOS SRAM Cell을 개발하였다. Retrograde Well과 PSL(Poly Spacer LOCOS) Isolation 공정을 사용하여 1.76mm의 n+/p+ Isolation을 구현하였으며 Ti/TiN Local Interconnection을 사용하여 Polycide수준의 Rs와 작은 Contact저항을 확보하였다. p-well내의 Boron이 Field oxide에 침적되어 n+/n-well Isolation이 취약해짐을 Simulation을 통해 확인할 수 있었으며, 기생 Lateral NPN Bipolar Transistor의 Latch Up 특성이 취약해 지는 n+/n-wellslze는 0.57mm이고, 기생 Vertical PNP Bipolar Transistor는 p+/p-well size 0.52mm까지 안정적인 Current Gain을 유지함을 알 수 있었다. Ti/TiN Local Interconnection의 Rs를 Polycide 수준으로 낮추는 것은 TiN deco시 Power를 증가시키고 Pressure를 감소시킴으로써 실현할 수 있었다. Static Noise Margin분석을 통해 Vcc 0.6V에서도 Cell의 동작 Margin이 있음을 확인할 수 있었으며, Load Device의 큰 전류로 Soft Error를 개선할수 있었다. 본 공정으로 제조한 1M Full CMOS SRAM에서 Low Vcc margin 1.0V, Stand-by current 1mA이하(Vcc=3.7V, 85℃기준) 를 얻을 수 있었다.