• 전자공학회논문지A
• /
• 제29A권9호
• /
• pp.56-64
• /
• 1992

Because of a small bandgap energy, a high doping density, and a low operating temperature, the dark current in HgCdTe photodiode is almost composed of a tunneling current. The tunneling current is devided into an indirect tunneling current via traps and a band-to-band direct tunneling current. The indirect tunneling current dominates the dark current for a relatively high temperature and a low reverse bias and forward bias. For a low temperature and a high reverse bias the direct tunneling current dominates. In this paper, to verify the tunneling currents in HgCdTe photodiode, the new tunneling-recombination equation via trap is introduced and tunneling-recombination current is calculated. The new tunneling-recombination equation via trap have the same form as SRH (Shockley-Read-Hall) generation-recombination equation and the tunneling effect is included in recombination times in this equation. Chakrabory and Biswas's equation being introduced, band to band direct tunneling current are calculated. By using these equations, HgCdTe (mole fraction, 0.29 and 0.222) photodiodes are analyzed. Then the temperature dependence of the tunneling-recombination current via trap and band to band direct tunneling current are shown and it can be known what is dominant current according to the applied bias at athe special temperature.

• 한국정보통신학회:학술대회논문집
• /
• 한국정보통신학회 2018년도 추계학술대회
• /
• pp.512-513
• /
• 2018

트랩-보조-터널링(Trap-Assisted-Tunneling; TAT)은 실제 터널링 전계 효과 트랜지스터 (TFET)의 임계 이하 기울기를 저하시키고 시뮬레이션에서 고려되어야한다. 그러나, 그 메커니즘은 라인 터널링 타입 L형 TFET(LTFET)에서는 잘 알려져 있지 않았다. 본 연구는 dynamic nonlocal Schenk 모델을 이용한 LTFET의 TAT 메커니즘을 연구한다. 이 연구에서는 터널링 이벤트를 위해서 phonon assisted and direct band가 모두 고려되었다.

• 한국정보통신학회논문지
• /
• 제7권4호
• /
• pp.719-724
• /
• 2003

본 논문은 halo doping profile을 갖는 나노구조 LDD MOSFET의 문턱전압에 대하여 연구하였다. 소자의 크기는 일반화된 스켈링 이론을 사용하여 100nm 에서 40m까지 스켈링하였다. Van Dort Quantum Correction Model(QM) 모델을 정전계 스켈링 이론과 정전압 스켈링 이론에 적용하여 문턱전압을 조사하였으며, gate oxide 두께의 변화 따른 direct tunneling current를 조사하였다. 결과적으로 게이트 길이가 감소됨에 따라 문턱전압이 정전계 스켈링에서는 감소하고 정전압 스켈링에서는 증가함을 알았고 direct tunneling current는 gate oxide 두께가 감소함에 따라 증가됨을 알았다. 또한 채널 길이의 감소에 따른 MOSFET의 문턱전압에 대한 roll-off특성을 최소화하기 위하여 일반화된 스켈링에서 $\alpha$값은 거의 1 이여야 함을 알았다.

• 한국정보통신학회:학술대회논문집
• /
• 한국해양정보통신학회 2002년도 추계종합학술대회
• /
• pp.494-497
• /
• 2002

본 논문에서는 halo doping profile을 갖는 나노구조 LDD MOSFET의 문턱전압에 대한 시뮬레이션 결과를 나타내었다. 소자 크기는 generalized scaling을 사용하여 100nm에서 40nm까지 스케일링하였다. Van Dort Quantum Correction Model(QM)을 사용하여 정전계 스케일링과 정전압 스케일링에 대한 문턱 전압과 각각의 게이트 oxide 두께에 대한 direct tunneling 전류를 조사하였다. 게이트 길이가 감소할 때 정전계 스케일링에서는 문턱전압이 감소하고, 정전압 스케일링에서는 문턱전압이 증가하는 것을 알 수 있었고, 게이트 oxide두께가 감소할 때 direct tunneling 전류는 증가함을 알 수 있었다. 감소하는 채널 길이를 갖는 MOSFET 문턱전압에 대한 roll-off 특성을 최소화하기 위해 generalized scaling에서 $\alpha$값은 1에 가깝게 되는 것을 볼 수 있었다.

• 한국통신학회논문지
• /
• 제42권3호
• /
• pp.585-594
• /
• 2017

무선 Docking 시스템은 기존에 설치된 모니터, 키보드 등의 별도 환경을 통하여 스마트폰 등의 이동형 컴퓨팅 장치 사용에 편의성을 제공하는 환경으로써, 사용자는 Docking 시스템이 구축된 어느 환경에서라도 자신의 이동형 컴퓨팅 장치를 다양한 주변 장치들을 활용하여 편리하게 사용할 수 있다. Docking 시스템은, 컴퓨팅 장치를 중심으로 구축된 기존 데스크탑 및 Laptop 환경과 달리, 컴퓨팅 장치를 제외한 주변 장치들로 구성되어 있다. Wi-Fi Alliance에서는 이러한 환경을 제공하기 위하여 Wi-Fi Docking 표준화를 최근 진행 중이며, 기존에 발표된 Wi-Fi Direct 표준 기술(Wi-Fi Peer-to-Peer Technical Specifications v1.2, 2010)을 활용하고 있다. 하지만, Docking 시스템에서 Bluetooth 장치를 사용할 경우 인터페이스 상이로 인하여 복잡한 Connectivity가 발생될 수 있다. 본 고에서는 이러한 문제를 해결하기 위하여 Wi-Fi Direct 환경에서 Bluetooth 장치 연결을 Tunneling 할 수 있는 기술을 설계하고 실험을 통하여 분석하였다.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제8권2호
• /
• pp.164-169
• /
• 2008

The effects of the antisite related defects on the electronic structure of silica and the gate leakage current have been investigated using first-principles calculations. Energy levels related to the antisite defects in silicon dioxide have been introduced into the bandgap, which are nearly 2.0 eV from the top of the valence band. Combining with the electronic structures calculated from first-principles simulations, tunneling currents through the silica layer with antisite defects have been calculated. The tunneling current calculations show that the hole tunneling currents assisted by the antisite defects will be dominant at low oxide field whereas the electron direct tunneling current will be dominant at high oxide field. With increased thickness of the defect layer, the threshold point where the hole tunneling current assisted by antisite defects in silica is equal to the electron direct tunneling current extends to higher oxide field.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제3권3호
• /
• pp.139-144
• /
• 2003

We report the results of extensive mixed mode simulations and theoretical analysis to quantify the contribution of the edge direct tunneling (EDT) current on the total gate leakage current of 80nm NMOSFET with SiO2 gate dielectric. It is shown that EDT has a profound impact on basic analog circuit building blocks such as sample-hold (S/H) circuit and the current mirror circuit. A transistor design methodology with zero gate-source/drain overlap is proposed to mitigate the EDT effect. This results in lower voltage droop in S/H application and better current matching in current mirror application. It is demonstrated that decreasing the overlap length also improves the basic analog circuit performance metrics of the transistor. The transistor with zero gate-source/drain overlap, results in better transconductance, input resistance, output resistance, intrinsic gain and unity gain transition frequency.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제1권1호
• /
• pp.40-49
• /
• 2001

We have developed a repeatable process of forming uniform, small-size and high-density self-assembled Si nano-crystals. The Si nano-crystals were fabricated in a conventional LPCVD (low pressure chemical vapor deposition) reactor at $620^{\circ}c$ for 15 sec. The nano-crystals were spherical shaped with about 4.5 nm in diameter and density of $5{\times}l0^{11}/$\textrm{cm}^2$. More uniform dots were fabricated on nitride film than on oxide film. To take advantage of the above-mentioned characteristics of nitride film while keeping the high interface quality between the tunneling dielectrics and the Si substrate, nitride-oxide tunneling dielectrics is proposed in n-channel device. For the first time, the single electron effect at room temperature, which shows a saturation of threshold voltage in a range of gate voltages with a periodicity of ${\Delta}Ｖ_{GS}\;{\approx}\;1.7{\;}V$, corresponding to single and multiple electron storage is reported. The feasibility of p-channel nano-crystal memory with thin oxide in direct tunneling regime is demonstrated. The programming mechanisms of p-channel nano-crystal memory were investigated by charge separation technique. For small gate programming voltage, hole tunneling component from inversion layer is dominant. However, valence band electron tunneling component from the valence band in the nano-crystal becomes dominant for large gate voltage. Finally, the comparison of retention between programmed holes and electrons shows that holes have longer retention time.

• Journal of the Optical Society of Korea
• /
• 제12권4호
• /
• pp.314-318
• /
• 2008

We investigate the conditions of the complete tunneling of light across a composite barrier made of multiple layers involving metamaterials. It is shown that complete tunneling phenomena are related to the resonance transmission properties of local modes formed in barrier layers and that there are two distinctive kinds of local barrier modes involved in actual complete tunneling: the degenerate inner-barrier mode and the full barrier mode. Complete tunneling occurs via two successive mode couplings: from the incident plane wave to the plane wave in the transmission layer through the direct mediation of these two kinds of local barrier modes.

• International Journal of Precision Engineering and Manufacturing
• /
• 제9권4호
• /
• pp.11-15
• /
• 2008

Metrology tools with the ability to measure spindle motion error on the order of a nanometer are required due to recent advances in nanotechnology. We propose a direct measurement method for the radial motion error of a precision spindle using a regular crystalline lattice and a scanning tunneling microscope (STM). A highly oriented pyrolytic graphite (HOPG) crystal combined with an STM is used as a two-dimensional reference scale. The measurement principle and the preliminary experimental results are discussed in this article. The preliminary experimental results demonstrated that the proposed method has the capability to incorporate a two-dimensional encoder to measure the spindle motion error.