• Title/Summary/Keyword: Digital unit

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A Study on the Digital Unit Development for Turbine Load Set Control (Turbine Load Set 조정을 위한 Digital Unit 개발)

  • Moon Yong-Seon;Jeong Ho-Jin;Kang Sung-Ryul;Choi Hyeong-Yoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.498-503
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    • 2005
  • As important device that decide output load in superannuated thermoelectric power plant which do Turbine Load Set Motor device. This generation of electric power system operated Set Up Range Motor according to Set Up value that operator manufactures by hand circumvolve, and generation of electric power output load derision is consisted by internal action including Motor Therefore, in this research passively output load operated Turbine Motor Drive equipment that can have existing Turbine Load Set Motor Performance developing Digital Drive Unit device design. Also control algorithm implementation and existing Turbine Load Set Motor Drive and connection possibility through designed controlling system to connect basis function that decide development output load with Digital Drive Unit that designed also with existing Motor Drive Unit and can be operated.

Development of Automatic Digital/Analog Lighting Control System using ATMega 128 (ATMega128을 이용한 디지털/아날로그 자동조명제어장치의 개발)

  • Kim, Dong-Wan;Park, Sung-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.55 no.4
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    • pp.161-166
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    • 2006
  • In this paper, an automatic lighting control system is developed using microprocessor. The developed system consists of a digital lighting control unit, an analog lighting control unit, and a lighting control simulator. In the developed system, ATMega128 is used as the main controller. The developed digital lighting control unit consists of eight modules and the developed analog lighting control unit consists of six modules respectively. Additional, the developed simulator consists of a digital and an analog lighting control simulation using graphic user interface. And so this developed system can be applied to the controller design of the interior and exterior lighting equipment.

Design and Implementation of a Hybrid-Type Mass Flow Controller (하이브리드형 질량 유량 제어기의 설계 및 실현)

  • 이명의;정원철
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.4 no.2
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    • pp.63-70
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    • 2003
  • In this paper, an MFC (Mass Flow Controller) which is widely used in many semiconductor manufacturing processes for controlling the mass flow rate of a gas is designed and implemented using the PIC 16F876 of Microchip, Inc. The MFC implemented in this thesis has the form of hybrid-type, i.e., the mixed-type of the analog-type MFC, which has many problems such as low accurary, and digital-type MFC, which use an expensive DSP (Digital Signal Processor) and an ADC (Analog to Digital Convertor) with high precision. The MFC is consists of the sensor unit, the control unit and the actuator unit, and it has used the automatic calibration algorithm and the reference table method for the improvement of the performance.

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Design of FPGA in Power Control Unit for Control Rod Control System (원자로 제어봉 구동장치 제어시스템용 전력제어기 FPGA 설계)

  • Lee, Jong-Moo;Shin, Jong-Ryeol;Kim, Choon-Kyung;Park, Min-Kook;Kwon, Soon-Man
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.563-566
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    • 2003
  • We have designed the power control unit which belongs to the power cabinet and controls the power supplied to Control Rod Drive Mechanism(CRDM) as a digital system based on Digital Signal Processor(DSP). The power control unit dualized as the form of Master/Slave has had its increased reality. The Central Process Unit(CPU) board of a power control unit possesses two Digital Signal Processors(DSPs) of the control DSP for performing the tasks of power control and system monitoring and the communication of the Control DSP and the Communication DSP. To accomplish the functions requested in the power control unit effectively, we have installed Field Programmable Gate Arrays(FPGAS) on the CPU board and have FPGAs perform the memory mapping, the generation of each chip selection signal, the giving and receiving of the signals between the power controllers dualized, the fault detection and the generation of the firing signals.

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Method of SSO Noise Reduction on FPGA of Digital Optical Units in Optical Communication

  • Kim, Jae Wan;Eom, Doo Seop
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.97-101
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    • 2013
  • There is a growing need for optical communication systems that convert large volumes of data to optical signals and that accommodate and transmit the signals across long distances. Digital optical communication consists of a master unit (MU) and a slave unit (SU). The MU transmits data to SU using digital optical signals. However, digital optical units that are commercially available or are under development transmit data using two's complement representation. At low input levels, a large number of SSOs (simultaneous switching outputs) are required because of the high rate of bit switching in two's complement, which thereby increases the power noise. This problem reduces the overall system capability because a DSP (digital signal processor) chip (FPGA, CPLD, etc.) cannot be used efficiently and power noise increases. This paper proposes a change from two's complement to a more efficient method that produces less SSO noise and can be applied to existing digital optical units.

Communication Methodology Between Digital FRTUs Based on Wi-Fi Communication for the Smart Grid of Distribution System Area (스마트 그리드 배전 시스템을 위한 와이파이 통신에 기반한 디지털 FRTU간 통신 방법론 기초연구)

  • Woo-Kyung, Jin;Ji-Hyeon, Youn;Min-Seok, Choi;Jae-Hyun, Lee;Birek, Ohgan;Yun-Seok, Ko
    • The Journal of the Korea institute of electronic communication sciences
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    • v.17 no.6
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    • pp.1113-1120
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    • 2022
  • In this paper, a communication methodology for the digital FRTU(: Feeder Remote Terminal Unit) required by the smart grid distribution system was studied. The digital FRTU consists of a fault handling unit and a communication unit. The fault handling unit transmits fault information to the communication unit in case of a failure, and the communication unit is designed to autonomously determine the fault section through two-way communication between surrounding digital FRTUs. For performance verification, a performance verification system consisting of 3 line sections based on 3 digital FRTUs was constructed to enable fault simulation for various failure scenarios. Various fault cases including one phase ground fault, line-to-line short-circuit fault, and three-phase short-circuit fault were experimentally simulated on the established performance verification system, and the validity of the developed methodology was confirmed by proving the accurate fault section inference results for each fault simulation case.

Quality System for Venture Telecommunication Business (벤처통신산업에서의 품질시스템 구축방안 -W사를 중심으로)

  • 최성운;김경근
    • Journal of the Korea Safety Management & Science
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    • v.3 no.1
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    • pp.107-116
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    • 2001
  • ISO 9000 has brought about significant positive effects to the quality management system and quality improvement. This paper develops effective and flexible ISO 9000 quality system based on telecommunication manufactured goods with CSU(Channel Service Unit), ADSL(Asymmetric Digital Subscriber Line), Fiber Optic Multiplexer, HDSL(High-bit-rate Digital Subscriber Line), FDSU(Flexible Data Service Unit), 73 DSU(Digital Service Unit). The case studies of venture telecommunication corporation in establishing ISO 9000 qualify system are also discussed.

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A Method of implementing HomeN Education Portal System for TV Internal Service (TV기반의 홈엔 교육포탈시스템 구축방법)

  • Hah YunKyung;Choi Daehyun;Choi Jungho;Kim Jae D.
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.11a
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    • pp.286-288
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    • 2005
  • KT 메가패스를 기반으로 하는 홈엔(HomeN) 미디어 서비스가 신규 서비스 추가 및 UI개선으로 새롭게 개발되었다. 홈엔의 신규 서비스중에 하나인 교육/문화 전문채널 서비스는 고객에게 TV기반의 EOD 온라인서비스를 제공함으로써 편리한 학습환경을 제공하고 홈네트워크 서비스의 활용도 향상에 기여할 수 있을 것이다. 따라서 본고에서는 교육/문화 전문채널 서비스의 유형 및 서비스 정책, 서비스 플랫폼 구성을 소개하고 향후 홈엔 전문채널 서비스의 나아가야할 방향을 조망해보고자 한다.

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Applicability of the digital instrument to improve the reproducibility of motor unit number index

  • Ahn, Suk-Won
    • Annals of Clinical Neurophysiology
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    • v.20 no.1
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    • pp.26-30
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    • 2018
  • Background: The motor unit number index (MUNIX) and motor unit size index (MUSIX) refer to the electrophysiological measurement of the motor units using the surface electromyographic interference pattern (SIP) recorded during graded muscle contraction. In order to improve the reliability and reproducibility of MUNIX by the systematization of the graded muscle contractions, we applied a digital hand instrument to the procedure of recording SIP signals. Methods: We tested the applicability of the digital instrument in the MUNIX technique by assessing the mean values and the reproducibility of the MUNIX involving the abductor pollicis brevis (APB) and the abductor digiti minimi (ADM) muscles in 30 healthy adults. Results: The digital dynamometer was successfully applied to the MUNIX measurements of the APB and ADM muscles, and showed high reproducibility across trials. Conclusions: Application of the digital instrument would be useful in improving the reliability and reproducibility of MUNIX.

Development of Digital Transceiver Unit for 5G Optical Repeater (5G 광중계기 구동을 위한 디지털 송수신 유닛 설계)

  • Min, Kyoung-Ok;Lee, Seung-Ho
    • Journal of IKEEE
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    • v.25 no.1
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    • pp.156-167
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    • 2021
  • In this paper, we propose a digital transceiver unit design for in-building of 5G optical repeaters that extends the coverage of 5G mobile communication network services and connects to a stable wireless network in a building. The digital transceiver unit for driving the proposed 5G optical repeater is composed of 4 blocks: a signal processing unit, an RF transceiver unit, an optical input/output unit, and a clock generation unit. The signal processing unit plays an important role, such as a combination of a basic operation of the CPRI interface, a 4-channel antenna signal, and response to external control commands. It also transmits and receives high-quality IQ data through the JESD204B interface. CFR and DPD blocks operate to protect the power amplifier. The RF transmitter/receiver converts the RF signal received from the antenna to AD, is transmitted to the signal processing unit through the JESD204B interface, and DA converts the digital signal transmitted from the signal processing unit to the JESD204B interface and transmits the RF signal to the antenna. The optical input/output unit converts an electric signal into an optical signal and transmits it, and converts the optical signal into an electric signal and receives it. The clock generator suppresses jitter of the synchronous clock supplied from the CPRI interface of the optical input/output unit, and supplies a stable synchronous clock to the signal processing unit and the RF transceiver. Before CPRI connection, a local clock is supplied to operate in a CPRI connection ready state. XCZU9CG-2FFVC900I of Xilinx's MPSoC series was used to evaluate the accuracy of the digital transceiver unit for driving the 5G optical repeater proposed in this paper, and Vivado 2018.3 was used as the design tool. The 5G optical repeater digital transceiver unit proposed in this paper converts the 5G RF signal input to the ADC into digital and transmits it to the JIG through CPRI and outputs the downlink data signal received from the JIG through the CPRI to the DAC. And evaluated the performance. The experimental results showed that flatness, Return Loss, Channel Power, ACLR, EVM, Frequency Error, etc. exceeded the target set value.