• 한국측량학회:학술대회논문집
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• 한국측량학회 2009년도 춘계학술발표회 논문집
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• pp.11-13
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• 2009

본 연구는 최신의 수치지도 확보를 위한 갱신방안으로서 건축 및 다양한 SOC 건설공사에서 사용되고 있는 CAD 자료의 준공도면을 활용하여 수치지도를 갱신하기 위해 GIS 데이터로 변환하는 기법을 제시하였다. 변환과정은 레이어 추출, 객체변환, 좌표변환, 포맷변환으로 구성되며 CAD 데이터로부터 각 과정을 거쳐 변환된 GIS 데이터는 수치지도를 갱신할 수 있다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 학술대회 논문집 전문대학교육위원
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• pp.100-102
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• 2001

This paper resents digital controller of emergency power generator system. The controller offers an integrated alternative for Genset control, metering and remote monitoring. Proposed controller used 80c196kc one chip microprocessor for digital control, it measures parameters of generator and provides output signals to control starting and stopping of generator. Additionally protection and alarm functions are considered to system stability. As almost parts of controller are embedded by digital microprocessor and FPGA techniques, the controller has a more flexible feature and an improvement of precision. The developed system has a big merit economically and is suitable for any kW size generator.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회 2004년도 추계학술대회 및 정기총회
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• pp.430-460
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• 2004

This study presented a personalization system that adopted a methodology which is applicable for digital content recommendation and executed by the Internet service providers. The system made a recommendation to the users on the basis of their preferences, while most techniques for recommending digital content have focused on considering the similarity of content. In addition, it developed a method of evaluation to determine the priority of recommendations and adopted measures when selecting a set of recommendations. To experiment the feasibility and effectiveness of the presented methodology, a prototype system was developed and was applied to an English newspaper on the Internet.

• 전자공학회논문지T
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• 제35T권3호
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• pp.96-102
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• 1998

본 논문에서는 스위칭시 ZVS 기능을 갖는 풀 브리지 위상전이 컨버터의 디지털 컨트롤러의 설계에 대해 연구하였다. 디지털 컨트롤러는 인버터나 전동기 구동 시스템에서 넓게 사용되었다. 그러나 디지털 컨트롤러는 고주파 스위칭 파워 서플라이 (특히 풀브리지 DC/DC 컨버터)에는 적용되지 못했었다. 따라서 본 논문에서는 ZVS 기능을 가진 풀 브리지 위상전이 컨버터의 디지털 컨트롤을 위한 방법을 제안하고, 기존의 아날로그 컨트롤러와 비교하였다. 수치 연산 패키지인 MATLAB을 이용한 컴퓨터 시뮬레이션을 통해 제어기 설계를 최적화하였다.

• 산업기술연구
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• 제23권A호
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• pp.55-61
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• 2003

In this study, a signal processing and related techniques for development of a weight measuring system using a digital loadcell which is able to satisfy the important properties of WIM (weighing-in-motion) system have been investigated. A fast and high accurate signal processing of the digital load cell sensor for weighing-in-motion system is presented. A/D conversion system is constructed to realize a stable A/D conversion and signal processing algorithm using DSP and microprocessor. A new technique for vibration and measuring speed of the system is also investigated. The proposed method was applied to the actual design and the experimental results showed good performance of the weighing speed and stability.

• 한국통신학회논문지
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• 제21권7호
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• pp.1777-1786
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• 1996

This paper describes theories and implementation techniques of a digital high-definition television(HDTV) modem based on 32-QAM for terrestrial broadcasting. We proposed a digital demodulation scheme and a symbol timing recovery structure based on the band edge component maximization(BECM) method. The adaptive equalizer has 256 complex taps to remove the multipath of delays ranging from -2.mu.s~+24.mu.s with a new T/2-spaced blind equalization algorithm. computer simulation results reveal that the proposed algorithm outperforms other conventional blind equalization algorithm a digital HDTV modem with 4.91MHz symobol rate is implemented by utilizing the proposed algorithms. All processings for modem operations such as demodulation, estimation of symbol timing phase error, adaptive equalization, and carrier recovery except IF signal processing and sampling phase control part of the AD converter are done in digital domain. Especially, the carrier recovery loop can track a carrier offset of upto .+-.350KHz.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2008년도 추계학술대회B
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• pp.2700-2703
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• 2008

An experiment on bubble-driven flow was performed in order to understand fundamental knowledge of flow structure around a rising bubble in a stagnant fluid. The measurement technique consists of a combination of the three most often used PIV techniques in multiphase flows: PIV with fluorescent tracer particles, the digital phase separation with a masking technique and a shadowgraphy. The key point of the measurement is that the background intensity of a PIV recording can be shifted to a higher level than a bubble region using a shadowgraphy in order to distinguish from fluorescent particles and a bubble as well. Flow fields were measured without an inaccurate analysis around a fluid-bubble interface by using only one camera simply.

• 제어로봇시스템학회논문지
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• 제13권12호
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• pp.1160-1166
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• 2007

This paper presents the design and implementation of an embedded image stabilization control system for a mobile phone with a built-in camera. Image stabilization is a family of techniques for reducing image blur resulting from minute camera shake due to hand-held shooting, thereby allowing the use of shutter speeds slower than values normally required to obtain sharp images. A mechanical image stabilizer mechanism developed for a camera mobile phone is introduced and a digital control system as a part of the image stabilization system is designed and implemented on an 8-bit microcontroller with integer arithmetic in C. This paper focuses primarily on issues that need to be taken into consideration for fixed-point implementation of the digital controller. Several experimental results are presented to demonstrate the performance of the implemented image stabilization control system.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2007년도 하계종합학술대회 논문집
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• pp.277-278
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• 2007

본 논문에서는 Film의 물리적인 특성을 Modeling하여 Film신호가 아닌 영상신호를 Film신호 특성을 갖도록 함으로써, Color가 보다 풍부한 느낌이 들게 하고 어두운 부분과 밝은 부분의 Dynamic Range를 확대하여, 일반 Video신호 영상을 필름 영화와 같은 Color효과를 갖도록 변환하는 방법에 대해 제안한다.

• 전기학회논문지
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• 제60권2호
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• pp.320-324
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• 2011

A digital technique is adopted to calibrate the current mismatch of the charge pump (CP) in phase-locked loops. A 2 GHz charge pump PLL (CPPLL) is used to justify the proposed calibration technique. The proposed digital calibration technique is implemented simply using a counter. The proposed calibration technique reduces the calibration time by up to a maximum of 50% compared other with techniques. Also by using a dual-mode CP, good current matching characteristics can be achieved to compensate $0.5{\mu}A$ current mismatch in CP. It was designed in a standard $0.13{\mu}m$ CMOS technology. The maximum calibration time is $33.6{\mu}s$ and the average power is 18.38mW with 1.5V power supply and effective area is $0.1804mm^2$.