• Journal of Power Electronics
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• v.12 no.1
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• pp.98-103
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• 2012

This paper presents a digital pulse width modulator (DPWM) with a reduced digital modulation delay (a transport delay of the modulator) during the transient response of power converters. During the transient response operation of a power converter, as a result of dynamic variations such as load step-up or step-down, the closed loop controller will continuously adjust the duty cycle in order to regulate the output voltage. The larger the modulation delays, the larger the undesired output voltage deviation from the reference point. The three conventional DPWM techniques exhibit significant leading-edge and/or trailing-edge modulation delays. The DPWM technique proposed in this paper, which results in modulation delay reductions, is discussed, experimentally tested and compared with conventional modulation techniques.

• Journal of Power Electronics
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• v.10 no.3
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• pp.277-284
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• 2010

This paper presents a novel hybrid carrier based space vector modulation for cascaded multilevel inverters. The proposed technique inherits the properties of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation are the reduction of power loss, and improved harmonic performance. The carrier based space vector modulation algorithm is implemented with a TMS320F2407 digital signal processor. A Xilinx Complex Programmable Logic Device is used to develop the hybrid PWM control algorithm and it is integrated with a digital signal processor for hybrid carrier based space vector PWM generation. The inverter offers less weighted total harmonic distortion and it operates with equal electrostatic and electromagnetic stress among the power devices. The feasibility of the proposed technique is verified by spectral analysis, simulation, and experimental results.

• Journal of Power Electronics
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• v.10 no.4
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• pp.365-373
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• 2010

This paper proposes a hybrid single carrier sinusoidal modulation suitable for multiphase multilevel inverters. Multiphase multilevel inverters are controlled by hybrid modulation to provide multiphase variable voltage and a variable frequency supply. The proposed modulation combines the benefits of fundamental frequency modulation and single carrier sinusoidal modulation (SC-SPWM) strategies. The main characteristics of hybrid modulation are a reduction in switching losses and improved harmonic performance. The proposed algorithm can be applied to cascaded multilevel inverter topologies. It has low computational complexity and it is suitable for hardware implementations. SC-SPWM and its base modulation design are implemented on a TMS320F2407 digital signal processor (DSP). A Complex Programmable Logic Device realizes the hybrid PWM algorithm and it is integrated with a DSP processor for hybrid SC-SPWM generation. The feasibility of this hybrid modulation is verified by spectral analysis, power loss analysis, simulation and experimental results.

• Journal of the Korea Institute of Military Science and Technology
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• v.11 no.4
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• pp.36-45
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• 2008

LYNX ESM system operates digital receiver for analyzing radar of intrapulse modulation signal. This paper contains DC offset compensation method of IQ channels, imbalancing comensation method of amplitude and phase, precisional PW measurement using adaptive threshold set, analyzing algorithm of intrapulse modulation signals. Its effectiveness was proven by technical and operational test.

• Journal of the Korean Institute of Intelligent Systems
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• v.14 no.6
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• pp.726-731
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• 2004

This paper proposes a pulse-width-modulation (PWM) controller design technique using intelligent digital redesign. Intelligent digital redesign is to convert a well-designed analog fuzzy-model-based controller into an equivalent pulse-amplitude-modulation (PAM) digital controller maintaining the original analog control system in the sense of state-matching. In similar line of conversion concept, the redesigned PAM intelligent digital controller is converted into a PWM controller using the equivalent area principle. To convincingly visualize the proposed technique, an computer simulation example-attitude control of nonlinear artificial satellite system is included.

• Journal of Korea Society of Digital Industry and Information Management
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• v.16 no.2
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• pp.45-52
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• 2020

This paper is focused on the modulation scheme detection of the IEEE 802.11 standard. In the IEEE 802.11ac standard, the information of the modulation scheme is indicated by the modulation coding scheme (MCS) included in the VHT-SIG-A of the preamble field. Transmitting end determines the MCS index suitable for the low signal to noise ratio (SNR) situation and transmits the data accordingly. Since data field decoding can take place only when the receiving end acquires the MCS index information of the frame. Therefore, accurate MCS detection must be guaranteed before data field decoding. However, since the MCS index information is the information obtained through preamble field decoding, the detection rate can be affected significantly in a low SNR situation. In this paper, we propose a relatively robust modulation classification method based on deep learning to solve the low detection rate problem with a conventional method caused by a low SNR.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2427-2430
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• 2003

A uniformly sampled digital pulse-width modulation adopting a pre-compensation filter scheme for applications in high-resolution digital-to-analog data conversion is described. It is shown that linearization of the intrinsic distortion resulting in uniformly sampled pulse-width modulation can be achieved by using a non-integer delay digital filter embedded within a noise shaping re-quantizer.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.654-657
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• 1998

This paper is described a digital implementation of a pulse area modulation (PAM) method for a unity-power-factor buck-boost converter. A digital controller is designed and implemented by a Digital Signal Processor(DSP) to replace the analog control circuit for PAM. Experimental results are presented and compared with simulations.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.54-57
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• 1998

This paper describes a digital implementation of a pulse amplitude modulation(PAM) method for a unity-power-factor buck-booster converter. A digital controller is designed and implemented by a Digital Signal Processor(DSP) to replace the analog control circuit for PAM. Experimental results are presented and compared with simulations.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2006.06a
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• pp.249-250
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• 2006

In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.