• Journal of information and communication convergence engineering
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• v.9 no.3
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• pp.276-281
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• 2011

This paper presents a method of constructing the switching function using edge-valued decision diagrams. The proposed method is as following. The edge-valued decision diagram is a new data structure type of decision diagram which is recently used in constructing the digital logic systems based on the graph theory. Next, we apply edge-valued decision diagram to function minimization of digital logic systems. The proposed method has the visible, schematic and regular properties.

• ETRI Journal
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• v.9 no.4
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• pp.26-35
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• 1987

Switching system can be regarded as the key node of Integrated Services Digital Networks(ISDN) because it plays the Important role in realization of ISDN. As ISDN is evolved from the telephony Integrated Digital Network(IDN), the switching system for ISDN will be evolved from the function and structure of telephony digital switching system. At near future, ISDN switching system is expected to implement the integrated access and transparent switching functions for both voice and data. As final goals of switching system, advanced switching methods for information having various traffic characteristics such as voice, data, text and image should be considered. This paper considered. This paper will show some of the fundamental design challenges and architectural trends in ISDN switching system.

• ETRI Journal
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• v.39 no.4
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• pp.525-534
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• 2017

A hardware-acceleration architecture that separates virtual network functions (VNFs) and network control (called HSN) is proposed to solve the mismatch between the simple flow steering requirements and strong packet processing abilities of software-defined networking (SDN) forwarding elements (FEs) in SDN/network function virtualization (NFV) architecture, while improving the efficiency of NFV infrastructure and the performance of network-intensive functions. HSN makes full use of FEs and accelerates VNFs through two mechanisms: (1) separation of traffic steering and packet processing in the FEs; (2) separation of SDN and NFV control in the FEs. Our HSN prototype, built on NetFPGA-10G, demonstrates that the processing performance can be greatly improved with only a small modification of the traditional SDN/NFV architecture.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.8
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• pp.3701-3727
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• 2016

Recently Service Function Chaining (SFC) is promising to innovate the network service mode in modern networks. However, a feasible implementation of SFC is still difficult due to the need to achieve functional equivalence with traditional modes without sacrificing performance or increasing network complexity. In this paper, we present a configurable network service chaining (CNSC) mechanism to provide services for network traffics in a flexible and optimal way. Firstly, we formulate the problem of network service chaining and design an effective service chain construction framework based on integrating software-defined networking (SDN) with network functions virtualization (NFV). Then, we model the service path computation problem as an integer liner optimization problem and propose an algorithm named SPCM to cooperatively combine service function instances with a network utility maximum policy. In the procedure of SPCM, we achieve the service node mapping by defining a service capacity matrix for substrate nodes, and work out the optimal link mapping policies with segment routing. Finally, the simulation results indicate that the average request acceptance ratio and resources utilization ratio can reach above 85% and 75% by our SPCM algorithm, respectively. Upon the prototype system, it is demonstrated that CNSC outperforms other approaches and can provide flexible and scalable network services.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.12
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• pp.2201-2206
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• 2008

This paper presents a method of constructing the Linear Digital Switching Function(LDSF) over finite fields. The proposed method is as following. First of all, we extract the input/output relationship of linear characteristics for the given digital switching functions, Next, we convert the input/output relationship to Directed Cyclic Graph(DCG) using basic gates adder and coefficient multiplier that are defined by mathematical properties in finite fields. Also, we propose the new factorization method for matrix characteristics equation that represent the relationship of the input/output characteristics. The proposed method have properties of generalization and regularity. Also, the proposed method is possible to any prime number multiplication expression.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.721-724
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• 2006

This paper presents a method of the constructing the digital logic switching functions and realizing the circuit design using partition techniques. First of all, we introduce the necessity, background and concepts of the partition design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the building block, based on each partition functions. And we apply the proposed method to the example, and we compare the results with the results of the earlier methods. In result, we describe the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.398-399
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• 2019

This paper presents a method of the circuit design of the multiple-valued digital logic switching functions based on the modular techniques. Fisr of all, we introduce the necessity, background and concepts of the modular design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the multiple-valued digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the modules, based on each partition functions. And we apply the proposed method to the example, we compare the results with the results of the earlier methods. In result, we decrease the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods. In the future research, we require the universal module that traet more partition functions and more compact module.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.766-767
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• 2015

This paper propose the method of constructing the switching function based on the IATPT. The proposed method have advantage which is the efficiency, regularity and extensibility and so on compare with earlier methods. We expect the proposed the method be able to contribute the constructing the any digital logic systems.

• Journal of Korea Society of Digital Industry and Information Management
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• v.7 no.1
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• pp.111-125
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• 2011

Smartphone is becoming as a core device of mobile environment. The purpose of this study is to investigate the factors affecting customer's buying decision on smartphone. Based on prior studies and cases, this study identifies network effect, switching cost, function, design, brand, after service, price as affecting factors of customer's buying decision on smartphone. It also aims to investigate the relationship between network effect/switching cost and re-purchasing. Result shows that network effect brand, after service are significantly related to customer's buying decision on smartphone by device types, but switching cost, function, design, price are not. Network effect also was found to be significantly related to the re-purchasing. The result of this study may provide a guideline of supply strategy with smartphone suppliers.

• 전기의세계
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• v.29 no.10
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• pp.678-688
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• 1980

This paper is concerned with the computer design of the multiple-output switching functions by using the improved MASK method in order to obtain the paramount prime implicants (prime implicants of the multiple-output switching function) and new algorithm to design the optimal logic network. All the given minterms for each function are considered as minterms of one switching function to simplify the desigh procedures. And then the improved MASK method whose memory requirement and time consuming are much less than any existing known method is applied to identify the paramount prime implicants. In selecting the irredundant paramount prime implicants, new cost criteria are generated. This design technuque is suitable both for solving a problem by hand or programming it on a digital computer.