• 제목/요약/키워드: Digital Sum Value

검색결과 26건 처리시간 0.024초

DC-억압 변조를 위한 GS 코딩의 최악 성능 평가 MaxMin 모형 (A MaxMin Model for the Worst Case Performance Evaluation of GS Coding for DC-free Modulation)

  • 박태형;이재진
    • 한국통신학회논문지
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    • 제38A권8호
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    • pp.644-649
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    • 2013
  • 광기록 정보저장장치에서 인코딩된 시퀀스의 DC-억압을 위해 Guided Scrambling 기법이 널리 사용된다. 후보 코드시퀀스 중 최적의 DC-억압 코드를 선택하기 위해 digital sum value (DSV)의 함수로 정의된 기준을 사용한다. 이 중 minimum DSV (MDSV), minimum squared weight (MSW), minimum threshold overrun (MTO) 등이 널리 사용된다. 본 연구에서는 MDSV, MSW, MTO 기준을 채택하는 GS 코딩 알고리즘과 동등한 정수계획법 모형을 제안한다. 개발된 MDSV 정수계획법 모형을 MaxMin 형태의 모형으로 확장하여 스크램블링 다항식과 제어 비트에 따른 MDSV GS 코딩의 최악 성능을 평가할 수 있는 모형을 개발하였다. 모의실험에서는 다수의 스크램블링 다항식 및 제어비트 조합에 대하여 MDSV 최악 성능을 계산하였다.

Block Diagonalization을 사용하는 하향링크 시스템에서의 MU-MIMO 사용자 스케쥴링 기법 (Novel User Selection Algorithm for MU-MIMO Downlink System with Block Diagonalization)

  • 김경훈
    • 디지털산업정보학회논문지
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    • 제14권3호
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    • pp.77-85
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    • 2018
  • Multi-User Multiple-Input Multiple-Output (MU-MIMO) is the core technology for improving the channel capacity compared to Single-User MIMO (SU-MIMO) by using multiuser gain and spatial diversity. Key problem for the MU-MIMO is the user selection which is the grouping the users optimally. To solve this problem, we adopt Extreme Value Theory (EVT) at the beginning of the proposed algorithm, which defines a primary user set instead of a single user that has maximum channel power according to a predetermined threshold. Each user in the primary set is then paired with all of the users in the system to define user groups. By comparing these user groups, the group that produces a maximum sum rate can be determined. Through computer simulations, we have found that the proposed method outperforms the conventional technique yielding a sum rate that is 0.81 bps/Hz higher when the transmit signal to noise ratio (SNR) is 30 dB and the total number of users is 100.

더블기어 자동 시각 검사 시스템 실계 및 구현 (Automated Visual Inspection System of Double Gear using Inspection System)

  • 이영교;김영포
    • 디지털산업정보학회논문지
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    • 제7권4호
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    • pp.81-88
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    • 2011
  • Mini Double Gears Frame is critical part of PDP and also produces couple hundred thousand every month. In the process of mass production, product inspection is very important process. Double Gear, one of the part of machine, was inspected by human eyes which caused mistakes and slow progress. To achieve the speed and accuracy the system was compensated by vision system which is inspecting automatically. The focus value is measured based on the fact that high contrast images have much high frequency edge information. High frequency term of the image is extracted using the high-pass filter and the sum of the high frequency term is used as the focus value. We used a Gaussian smoothing filter to reduce the noise and then measures the focus value using the modified Laplacian filter called a Sum modified Laplacian Focus values for the various lens positions are calculated and the position with the maximum focus value is decided as the focused position. The focus values calculated in various lens position showed the Gaussian distribution. We proposed a method to estimate the best focus position using the Gaussian curve fitting. Focus values of the uniform interval lens positions are calculated and the values are used to estimate the Gaussian distribution parameters to find the best focus position.

디지털 제어 적분형의 차단 현상이 없는 A/D 다중 비트 $\Sigma\Delta$ 변조기 (A Clipping-free Multi-bit $\Sigma\Delta$ Modulator with Digital-controlled Analog Integrators)

  • 이동연;김원찬
    • 전자공학회논문지C
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    • 제34C권4호
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    • pp.26-35
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    • 1997
  • This paper proposes a multi-bit $\Sigma\Delta$ modulator arcitecture which eliminates signal clipping problem. To avoid signal clipping, the output values of intgrators are monitored and modified by a reference value. This oepration is recorded as a digital code to restore actual signal value. Due to the digital code, the substraction of feedback value from the multi-bit quantizer can be calculated by a digital adder and this simplifies dAC operation making the accurate DAC of conventional multi-bit $\Sigma\Delta$ modulator scheme unnecessary. These features make N-th modulator can be implemented by sharing an integrator among N stages to decrease the required chip area. As an experimental example, a 4th order .sum..DELTA. modulator with oversampling ratio of 64 was simulated to show over 130 DB SNR at rail-to-rail input sinusoidal signal.

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탐색적 방법에 의한 건축공간 배치계획 최적화에 대한 고찰 (A Study on the Optimized Architectural Space Planning by Searching Algorithm Method)

  • 임명구;김수영
    • 한국디지털건축인테리어학회논문집
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    • 제1권1호
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    • pp.51-58
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    • 2001
  • The purpose of this study is to improve productivity of architectural space planning(A.S.P,) by computer system and to optimize ASP. A searching algorithm is the best way to slave optimized A.S.P. Because architectural design is too many various site situations and client's demands to specify the general solving methods. This method seek the best design case in all possibility and to be modeled as this; $\rightarrow$[$\rightarrow$$\rightarrow$