• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전력기술부문
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• pp.171-173
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• 2002

This paper presents a power system decomposition technique for digital simulation of large power system. To decompose power system, distributed transmission line model is used. But this model can be used only for long transmission lines. In this paper, capacitor compensation method is proposed to use distributed transmission line model for short transmission line. And case study shows proposed method can be used for effective power system decompositon in digital simulation of large power system.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.704-708
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• 2004

Recently, many nation have released standard such as IEC 61000-3-2 and IEEE 59, which impose a limit on the harmonic current drawn by equipment connected to AC line in order to prevent the distortion of an AC Line. Therefore, Plasma Display Panel (PDP) which is highlightened in digital display device also has the Power Factor Correction (PFC) circuit to meet the harmonic requirements. In PDP power module, the conventional boost converter is usually used for the PFC circuit. However, it comes serious thermal problem on it's bridge diode due to heat of PDP, and therefore the system stability is not guaranteed. In this paper, the bridgeless boost converter, which is used for PFC circuit of the PDP power module, is designed and verified the possibility of the application in a practical product in a view of efficiency, component count, temperature and etc.

• Journal of Power Electronics
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• 제9권6호
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• pp.903-910
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• 2009

In this paper, a digital average current mode control using diode current sensing technique is proposed. Although the conventional inductor current sensing technique is widely used, the sensed signal of the current is negative. As a result, it requires an additional circuit to be applied to general digital controller ICs. The proposed diode current sensing method not only minimizes the peripheral circuit around the digital IC but also consumes less power to sense current information than the inductor current sensing method. The feasibility of the proposed technique is verified by experiments using a 500W power factor correction (PFC) boost rectifier.

• 전기학회논문지
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• 제57권5호
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• pp.789-796
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• 2008

This paper describes a single-phase active power filter based on a newly developed digital controller. The developed controller utilizes FFT(Fast Fourier Transform) algorithm to extract the reference signal from the load current, considering the phase-angle delay of each order of harmonics. Optimized technique was applied for whole control algorithm to implement the real-time operation of developed controller. The performance of developed controller for a single-phase active power filter was verified through computer simulations with PSCAD/EMTDC. The feasibility of hardware implementation was confirmed by building and testing a prototype. The developed digital controller for a single-phase active power filter can compensate the harmonic current generated by the power supply for digital equipment.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.163-167
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• 2000

This paper presents the digital control of single-phase power factor correction(PFC) converter which has the variable gain according to the condition of inner control loop error. Generally the gain of inner current control loop in single-stage PFC converter has a constant magnitude. This has a bad influence on the power factor because current loop doesn't operate smoothly in the condition that input voltage is low In particular a digital controller has more time delay than an analog controller and degrades This drops the phase margin of the total digital PFC system,. It causes the problem that the gain of current control loop isn't increased enough. In addition the oscillation happens in the peak value of the input voltage open loop PFC system gain changes according to ac input voltage. These aspects make the design of the digital PFC controller difficult The digital PFC controller presented in this paper has a variable gain of current control loop according to input voltage. The 1kW converter was used to verify the efficiency of the digital PFC controller.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 A
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• pp.51-54
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• 1992

Protection and control systems play a prominent part in avoiding power delivery interruptions and help to get a fast and secure restoration when a failure occurs. In order to meet the higher functional requirements on modern power system, protection speed, selectivity, sensitivity, dependability, and security are essential to ensure reliability. These functions on be satisfied by taking advantage of microprocessor and communication technologies, and digital protection relays (systems) have been developed and applied to real power system enhancing reliability and saving money. It is necessary to have a tool to analyze the functions and algorithms of digital relays for installing them to power system. The purpose of this study is to develop a digital relay simulation program to estimate digital relay performances during system faults. Components of digital protective relay including analog filter, sampling unit, digital filter, and relay logic are modeled in this program.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.420_421
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• 2009

The digital TRS(Trunked Radio System) is an excellent alternative for the transmission medium for the DAS(Distribution Automation System). KEPCO(Korea Electric Power Corporation) made the power IT network with digital TRS system. The main function of the radio network is transmitting and receiving information for the DAS. KEPCO's digital TRS is based on TETRA standard. The digital TRS supports data communication for the electric power control and monitoring systems in various ways.

• Journal of Power Electronics
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• 제12권1호
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• pp.88-97
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• 2012

This paper presents a method for the digital control of a high power factor AC/DC converter employing the power balance control technique to achieve a fast response of the output voltage control. To avoid the effects of an output voltage ripple in the voltage control loop, the average output voltage is sampled and used as a feedback signal for the output voltage controller. The proposed control technique was verified by simulations using MATLAB/Simulink and its implementation was realized by a dsPIC30F4011 digital signal processor to control a CUK topology AC/DC converter with a 48V output voltage and a 250 W output power. The experimental results agree with the simulation results. The proposed control technique achieves a fast transient response with a lower line current distortion than is achieved when using a conventional proportional-integral controller and the power balance control technique with the conventional sampling method.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권3호
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• pp.300-311
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• 2016

The analog-to-digital-converter-based (ADC-based) backplane receivers that consist of a front-end ADC followed by a digital equalizer are gaining more popularity in recent years, as they support more sophisticated equalization required for high data rates, scale better with fabrication technology, and are more immune to PVT variations. Unfortunately, designing an ADC-based receiver that meets tight power and performance budgets of high-speed backplane link systems is non-trivial as both front-end ADC and digital equalizer can be power consuming and complex when running at high speed. This paper reviews the state of art designs for the front-end ADC and digital equalizers to suggest implementation choices that can achieve high speed while maintaining low power consumption and complexity. Design-space exploration using system-level models of the ADC-based receiver allows through analysis on the impact of design parameters, providing useful information in optimizing the power and performance of the receiver at the early stage of design. The system-level simulation results with newer device parameters reveal that, although the power consumption of the ADC-based receiver may not comparable to the receivers with analog equalizers yet, they will become more attractive as the fabrication technology continues to scale as power consumption of digital equalizer scales well with process.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.618-621
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• 1999

With the advent of the high-speed microprocessor and DSP, the possibility of executing a control strategy in digital domain has become a reality. By the use of the DSP and microprocessor controller, many high power drive system may be enhanced resulting in the improved robustness to EMI, the ability to communicate the operating conditions and the ease of adjusting the control parameters. But, the digital controller using DSP or microprocessor is not applied in the high frequency switching power supplies, especially full bridge DC/DC converter. So, this paper presents the method and realization of designing a digital-to-phase shift PWM circuit for full digital controlled full bridge DC/DC converter with zero voltage switching. The operating principles, simulation and experimental results will be presented.