• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.169-170
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• 2012

This paper presents implementation of digital phase controller for thyristor by using FPGA (Field Programmable Gate Array) in HVDC system. Implementation of digital HVDC system is possible by using superior digital simulator such as RTDS (Real Time Digital Simulator). But thyristor phase controller is typically implemented by analog circuit, because it is difficult to implement the phase controller with low operating speed of RTDS. To guarantee high control performance, phase controller needs fast operating speed. This paper presents FPGA based digital phase controller to obtain high speed and high performance. The entire digital simulation of the HVDC system is also implemented by interfacing between FPGA based phase controller and RTDS. Proposed digital HVDC simulator is verified through RTDS simulation.

• Journal of Power System Engineering
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• v.12 no.6
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• pp.70-77
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• 2008

The purpose of this study is to compare the quality of digital radiography image with that of classical film images for welded structure in power plants. The CMOS(Complementary Metal Oxide Semiconductor) flat panel detecter and Agfa D5 film are used to image flaw specimens respectively. In the test, CMOS flat panel detector has been determined to have a better image than that of film image. In the IQI(Image Quality Indicator) transmission test, one or two more line can be seen in digital image than in film image. Digital Radiography Test enabled to successfully detect all defects on the weld specimens fabricated with real reheat stem pipe and boiler tube as well. In the specific comparison test, Digital radiography test detected micro flaws in the size of 0.5 mm in length by 0.5 mm in depth. However, film test has limited it to 1.0 mm in length by 1.0 mm in depth. As a result of this study, digital radiography technology is estimated well enough to perform the inspection in the industry with far more cost effective way, compared to the classical film test.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1191-1192
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• 2011

We released new triple redundant digital excitation system with real time generator-turbine simulator. One of its great merits is the real time generator-turbine simulator when it was compared with the other products. If excitation system is tripped by unexpected faults, Maintenance man can do easily performance test of digital excitation control board, sequence relay and thyristor switching device of phase controlled rectifier without manufacturer's support. For the verification of this system, It was tested with an actual excitation system implemented on 5kVA M-G Set. After finishing the tests, the trial product will be installed and operated at a 500MW thermal power plant.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.49 no.9
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• pp.459-466
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• 2000

The performance of a commercialized power system stabilizer (PWX-600) for a single hydro-turbine generator and infinite bus system has been investigated using Real Time Digital Simulator (RTDS) in this paper. The test system was composed of RTDS, three phase voltage/current amplifier and the PSS. The test scheme provided a very efficient way to verify the design and control performance of a PSS to be applied to real power system. The scheme can also be applied to verify in real time the performance of hardware and software of power system controllers for FACTS and protective relays effectively.

• Proceedings of the KIEE Conference
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• 2000.07a
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• pp.215-217
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• 2000

Protective relay play a crucial role in the proper operation of a power system, and the reliable transfer of electrical power. This paper deals with the design and implementation of a digital protective relay on a single chip. Implementation on the FPGA(Field Programmable Gate Array) of the chip of digital protective relay. This protective relaying chip monitors the frequency and the voltage and current of the power system. And report the voltage, the current. the frequency, active power and reactive power.

• Journal of Power Electronics
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• v.10 no.3
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• pp.277-284
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• 2010

This paper presents a novel hybrid carrier based space vector modulation for cascaded multilevel inverters. The proposed technique inherits the properties of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation are the reduction of power loss, and improved harmonic performance. The carrier based space vector modulation algorithm is implemented with a TMS320F2407 digital signal processor. A Xilinx Complex Programmable Logic Device is used to develop the hybrid PWM control algorithm and it is integrated with a digital signal processor for hybrid carrier based space vector PWM generation. The inverter offers less weighted total harmonic distortion and it operates with equal electrostatic and electromagnetic stress among the power devices. The feasibility of the proposed technique is verified by spectral analysis, simulation, and experimental results.

• Journal of Digital Contents Society
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• v.10 no.4
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• pp.633-637
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• 2009

In this paper, we present the reuse module library generating algorithm and register-transfer (RT) library generating algorithm considering the power consumption of reuse module for field-programmable gate array (FPGA) technology mapping in order to implement into the circuit for calculating power consumption. To realize the circuit of calculation of power consumption, the FPGA is selected. Considering lookup table (LUT) conditions of selected FPGA, technology mapping process is conducted to minimize the total power consumption. With these information, the circuit is realized using suitable given power consumption among allocated results of modules.

• Proceedings of the KIEE Conference
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• 1987.11a
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• pp.355-358
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• 1987

A design of digital position control system with DC Motor is presented. The digital position control system is constructed by power circuits, interface circuits and control circuits using single chip microprocessor (8096). All control functions are implemented on the 16 bit micro-processor requiring only on incremental encoder for speed and position sensing. The control schemes are used by the proportional control for some modifications and braking algorithms. This digital position system offered to the fast response, good steady-state accuracy, flexibility and reliability, Hardware, software features and experimental results of this system are described.

• Proceedings of the KIEE Conference
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• 2000.07d
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• pp.3201-3204
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• 2000

In general, analog tester or strip chart recorder have been used to measure the corrosion potential of structures such as gas pipelines, oil pipelines, hot water pipelines, power cables etc. Recently, automatic digital data logger substitutes for these manual equipment because using these manual equipments are tedious and time consuming. However, digital data logger also has a shortcoming, that is, short measuring time because of the short lifetime of batteries. Therefore, we developed a long lifetime and low power loss battery taking advantage of galvanic series. In this paper, the results of development for power generator using two metals and DC/DC converter in order to obtain enough voltage for the operation of digital data logger. DC/DC converter operates with 0.5[V]. Its output voltage is 3.5[V] and output current is from 60[mAh] to 1,200[mAh].

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.6
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• pp.41-50
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• 1995

A state-of-the-arts GaAs power metal semiconductor field effect transistor (MESFET) for 3.3V operation digital hand-held phone at 900 MHz has been developed for the first time, The FET was fabricated using a low-high doped structures grown by molecular beam epitaxy (MBE). The fabricated MESFETs with a gate width of 16 mm and a gate length of 0.8 .mu.m shows a saturated drain current (Idss) of 4.2A and a transconductance (Gm) of around 1700mS at a gate bias of -2.1V, corresponding to 10% Idss. The gate-to-drain breakdown voltage is measured to be 28 V. The rf characteristics of the MESFET tested at a drain bias of 3.3 V and a frequencyof 900 MHz are the output power of 32.3 dBm, the power added efficiency of 68%, and the third-ordr intercept point of 49.5 dBm. The power MESFET developed in this work is expected to be useful as a power amplifying device for digital hand-held phone because the high linear gain can deliver a high power added efficiency in the linear operation region of output power and the high third-order intercept point can reduce the third-order inter modulation.