• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.220-223
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• 2002

The digital logic systems(DLS) is classified into digital combinational logic systems(CDLS) and digital sequential logic systems(SDLS). This paper presents a method of constructing the digital sequential logic systems without feedback. Firstly we assign all elements in Finite Fields to P-valued digit codes using mathematical properties of Finine Fields. Also, we discuss the operarional properties of the building block T-gate that is used to realizing digital sequential logic systems over Finite Fields. Then we realize the digital sequential logic systems without feedback. This digital sequential logic systems without feedback is constructed ny following steps. Firstly, we assign the states in the state-transition diagram to state P-valued digit dodo, then we obtain the state function and predecessor table that is explaining the relationship between present state and previous states. Next, we obtained the next-state function and predecessor table. Finally, we realize the circuit using T-gate and decoder.

• Journal of Practical Engineering Education
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• v.9 no.1
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• pp.41-48
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• 2017

In this paper, we proposed a method for digital logic circuit control, through arduino device programming with digital outputs, to design a curriculum for basic digital logic circuit practices. Curricula for arduino device programming and digital logic circuit are essentially practiced in engineering departments of colleges or high schools in South Korea. However, actual practice course lacks the experimental examples of digital logic circuit combined with arduino device programming. Furthermore, actual practice course lacks the curriculum in that students design and test their own digital logic circuits with the less cost than the oscilloscope. Therefore, to solve these problems in this paper, we proposed a curriculum for basic digital logic circuit practices during one semester. In this curriculum, students control and experiment their own digital logic circuits through arduino device programming with digital outputs.

• Journal of Practical Engineering Education
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• v.8 no.2
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• pp.95-101
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• 2016

In this paper, we introduce an implementation method of switch-based LED (Light Emitting Diode) Art logic circuits to help understanding the operation principle of digital logic circuits. Digital logic circuit practice using bread board is widely practiced in colleges or high schools in South Korea. However, actual digital logic circuit practice lacks examples of basic implementation, and as results of this problem, study with more complicated examples disturbs understanding the basic operation principle of digital logic circuits. Therefore, we proposed and tested an implementation method of switch-based LED Art logic circuits to help understanding the necessity of digital logic circuits which control signals of multiple output devices simultaneously.

• Proceedings of the IEEK Conference
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• summer
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• pp.213-217
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• 2004

This paper presents a method of constructing the digital logic systems(DLS) using edge-valued decision diagrams(EVDD). The proposed method is as following. The EVDD is a new data structure type of decision diagram(DD) that is recently used in constructing the digital logic systems based on the graph theory. Next, we apply EVDD to function minimization of digital logic systems. The proposed method has the visible, schematical and regular properties.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.907-910
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• 2003

We have developed Logic Design Training Kit for studying, actual training, designing of FPGA(Xillinx) or CPLD(ALTERA CPLD), the Digital Logic Device. This training kit has 12 matrix keys, RS232 port for serial communication and uses LED array. six FND(Dynamic), LCD as display part. That is standard specification for digital logic training kit. Special point of this kit is that we make two logic device trainig kit. This two logic device kit have more smaller and simple architecture because only uses one chip. That chip already includes a lot of functions that need for training kit, such as : complex logic circuit needed the two kind of logic devices, 16 way of system clock deviding function, serial communication interrupt....etc. We called that one chip is Center Bridge Chipset ; Xillinx FPGA Spartan2. User can select between using one device of FPGA or CPLD, or uses both them. Because of, Center Bridge Chipset has profitable architecture. it can work as Logic Device's networking with Master-Slave connection When using both logic devices.

• The Journal of Korean Association of Computer Education
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• v.11 no.2
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• pp.65-78
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• 2008

Many digital logic circuit simulators have been developed for the education on the experiments of digital logic circuits for college or high school students. But the existing simulators have some constraints on the number of inputs of gate, on the display of gate and wire states, and on the number of logic diagrams to be simulated. 1n this paper, we propose a simulator XSIM(eXpandable digital logic circuit SIMulator) which mitigates the constraints and allows multiple diagrams for large scale logics. It is expected that the multiple diagrams on large logics are helpful for team-teaching in school.

• Journal of The Korean Association of Information Education
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• v.13 no.3
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• pp.341-349
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• 2009

In this paper, we proposed an Electric Circuit manipulation method to identify easily results of Digital Logic Circuits. Using this method for computer science educations, we can feasibly instruct and understand principles of a Digital Logic Circuit which is a basis of real Digital systems. Furthermore, we developed an PBL-based education program for Digital Logic Circuit concept and Boolean Algebra concept by applying the proposed Electric Circuit manipulation method and by explaining real life Digital Instrument examples. The experimental results are analyzed in views of the problem-solving ability and suitability of allocating degrees of difficulties to the developed Digital Logic Circuit problems.

• Journal of the Institute of Convergence Signal Processing
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• v.2 no.2
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• pp.111-118
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• 2001

In this paper, in order to implement the multi-layered perceptron neural network using pure digital logic circuit model, we propose the new logic neuron structure, the digital canonical multi-layered logic neural network structure, and the multi-stage multi-layered logic neural network structure for pattern recognition applications. And we show that the proposed approach provides an incremental additive learning algorithm, which is very simple and effective.

• The Transactions of the Korea Information Processing Society
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• v.6 no.11
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• pp.3046-3059
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• 1999

Kailar Accountability Logic proposed for the accountability analysis of communication protocols that require accountability and use asymmetric key digital signature is extended for protocols that use symmetric key digital signature. A proposed electronic micropayment protocol that uses symmetric key digital signature is analyzed to illustrate the use of the extend logic in detecting its lack f accountability and suggesting changes to enhance its accountability.

• Nuclear Engineering and Technology
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• v.44 no.6
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• pp.697-708
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• 2012

The majority of instrumentation and control (I&C) systems in today's nuclear power plants (NPPs) are based on analog technology. Thus, most existing I&C systems now face obsolescence problems. Existing NPPs have difficulty in repairing and replacing devices and boards during maintenance because manufacturers no longer produce the analog devices and boards used in the implemented I&C systems. Therefore, existing NPPs are replacing the obsolete analog I&C systems with advanced digital systems. New NPPs are also adopting digital I&C systems because the economic efficiencies and usability of the systems are higher than the analog I&C systems. Digital I&C systems are based on two technologies: a microprocessor based system in which software programs manage the required functions and a programmable logic device (PLD) based system in which programmable logic devices, such as field programmable gate arrays, manage the required functions. PLD based systems provide higher levels of performance compared with microprocessor based systems because PLD systems can process the data in parallel while microprocessor based systems process the data sequentially. In this research, a bistable trip logic in a reactor protection system (RPS) was developed using very high speed integrated circuits hardware description language (VHDL), which is a hardware description language used in electronic design to describe the behavior of the digital system. Functional verifications were also performed in order to verify that the bistable trip logic was designed correctly and satisfied the required specifications. For the functional verification, a random testing technique was adopted to generate test inputs for the bistable trip logic.