Taining Kit for Xilinx FPGA or ALTERA CPLD Digital Logic Design with Center Bridge Chipset Architecture (중앙 브릿지 칩셋을 갖춘 Xilinx FPGA, ALTERA CPLD 겸용 Digital Logic Design Training kit)
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- Proceedings of the IEEK Conference
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- 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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- pp.907-910
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- 2003