• Journal of Power Electronics
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• v.17 no.2
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• pp.442-452
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• 2017

This paper deals with the input-output modeling of a vector controlled PMSM drive system and design of a simple multiple model adaptive control (MMAC) scheme with desired transient responses. We present a discrete-time modeling technique using closed-loop identification that can experimentally identify the equivalent models in the d-q coordinates. A bank of linear models for the equivalent plant of the current loop is first obtained by identifying them at several operating points of the current to account for nonlinearity. Based on these models, we suggest a simple q-axis MMAC combined with a fixed d-axis controller. After the current controller is designed, another equivalent model including the current controller in the speed control loop shall be similarly obtained, and then a fixed speed controller is synthesized. The proposed approach is demonstrated by experiments. The experimental set up consists of a surface mounted PMSM (5 KW, 220V, 8 poles) equipped with a flywheel load of 220kg and a digital controller using DSP (TMS320F28335).

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.217-218
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• 2008

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. A general method for achieving both reduced VCO gain(Kvco) and wide frequency band is to use the switched-capacitor bank LC VCO. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO with reduced variation of VCO gain and frequency steps. Buffers, divide-by-2 circuits and control logics the simulation results show that the designed circuit has a phase noise at 100kHz better than -106dBc/Hz throughout the signal band and consumes $9.5{\sim}13mA$ from a 1.8V supply.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.11b
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• pp.881-885
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• 2002

This paper presents the performance and the algorithm of a 1/3-octave band spectrum control system. The system is developed to provide various spectrums in a high intensity acoustic chamber. The required spectrum, which usually comes from launch vehicle company, starts from 25Hz band and ends 10kHz band. Automatic spectrum control system is preferred since the system requires short settling time to guarantee the safety of test objects and to reduce the amount of operating gas. The developed system adapted a PCI data-acquisition/signal-generation board installed in a personal computer to implement whole control logic. The control software used three cascade digital Butterworth filters using software. The filers are designed following ANSI S1.11 standard to implement 1/3 octave band filter bank. The graphical user interface of the system guides the user to follow standard operation procedure. The averaged control spectrum showed less than 0.05 dB in every running 1/3-octave band.

• Journal of Broadcast Engineering
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• v.6 no.1
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• pp.32-40
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• 2001

In this paper, we propose a DWT (discrete Wavelet Transform) based watermarking method, which can be conveniently Integrated In the up-coming JPEG2770 baseline system. Although Conventional DWT based watermarking techniques insert watermark signal Into wavelet coefficients after the transform, our proposed method embeds a watermark into wavelet coefficients obtained from the ongoing process of lifting for DWT. The proposed method allows us to selectively determine frequency characteristics of the coefficients where the watermark is embedded. so that the Inserted watermark cannot be removed or altered even when the filter-bank for DWT is known. Through the simulation, we show that the proposed method is more secure and more robust against various attacks than conventional DWT barred watermarking techniques.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.12
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• pp.5721-5727
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• 2012

In this study, we examine the effect of customers's participation and satisfaction on performance of IT project. This study collected data from the project team members of the next-generation internet banking project in K Bank. We found that customers's participation has positive effect on their satisfaction of IT project and the satisfaction also has a positive influence on performance of IT project. Implications and directions for future research are discussed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.131-137
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• 1999

In order to operate Internet Banking, there is a important thing to precede, That is to carry out a scheme of one-stop to let clients transact anything they want to buy and establish the preservation of public security system between existing banking networks. (of course, that should be designed handily to the clients). In this paper, the protocol which is determined between banking network and Internet to maintain the preservation of public security. In other words, each XPM(X.25 Packet Manager) is a program to manage both system security and service at each other side; manage all packets which are connected by X.25 protocol. If other condition like law and institution is improved, it will be adopted to real operation with various service. Further more, we tan construct Electronic Commerce and adopt various digital money like electronic coin or check.

• Journal of Power Electronics
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• v.12 no.4
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• pp.654-663
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• 2012

In this paper, a digital control strategy based on equivalent fundamental and odd harmonic resonators is proposed for single-phase DVRs. By using a delay block, which can be equivalent to a bank of resonators, it rejects the fundamental and odd harmonic disturbances effectively. The structure of the single closed-loop control system consists of a delay block, a proportional gain and a set of zero phase notch filters. The principle of the controller design is discussed in detail to ensure the stability of the system. Both the supply voltage and the load current feedforwards are used to improve the response speed and the ability to eliminate disturbances. The proposed controller is simple in terms of its structure and implementation. It has good performances in harmonic compensation and dynamic response. Experimental results from a 2kW DVR prototype confirm the validity of the design procedure and the effectiveness of the control strategy.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1070-1072
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• 2001

In recent years, customers and power supplies are interested in power quality. Demands of customers are change from standard quality of distribution power system to various high quality of distribution power system. so, it is necessary to apply power quality compensator, in our project, we develop the power quality compensator of 150kVA which compensates power factor and voltage sag, interruption. it is very frequently occurred power qualify problems[1,2]. As a series and shunt compensator, power quality compensator consists of two inverters with common do link capacitor bank. It compensates the current quality in the shunt part and the voltage qualify in the series part. In this paper we present the design and control algorithm of power quality compensator. As a control algorithm is implemented by digital controller, we consider sample-and-hold of signals. In this simulation, we use EMTDC/PSCAD V3.0 software which can simulate instantaneous voltage and current.

• Proceedings of the KIEE Conference
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• summer
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• pp.351-353
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• 2004

In recent years, customers and power supplies are interested in power quality. Demands of customers are change from standard quality of distribution power system to various high quality of distribution power system. so, it is necessary to apply power quality compensator. in our project, we develop the UPQC(Unfied Power Quality Compensator of 45kVA which compensates power factor and voltage sag, interruption. it is very frequently occurred power quality $problems^{[1-3]}$ As a series and shunt compensator, UPQC consists of two inverters with common do link capacitor bank. It compensates the current quality in the shunt part and the voltage quality in the series part. In this paper, we present the design and control algorithm for 4SkVA UPQC system. As a control algorithm is implemented by digital controller, we consider sample-and-hold of signals. In this simulation, we use EMTDC/PSCAD V3.0 software which can simulate instantaneous voltage and current.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.53-54
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• 2015

기존의 IEC 61850 표준 적용 국내 디지털변전소는 Station 레벨에 한정되어 구축되어 왔다. 향후 구축될 Process 레벨을 포함한 풀(Full) 디지털 변전소 디지털화는 디지털변전소 운전에 있어 중요하고 긴급한 신호인 Process bus를 통한 SV와 GOOSE신호의 전송으로 이루어지고 있다. Process bus를 활용한 배전선로 보호용 통합 IED는 GIS 등 변전소 전력설비로부터 전압과 전류 값을 MU(Merging Unit)를 통해 공급받아 각 구간의 Bay 혹은 Bank단위로 통합적인 보호 기능을 수행하고, 주 IED와 예비 IED가 서로의 상태를 상호 감시하여 보호기능의 이중화를 이루어야 하고, Sampled Value를 처리하기 위한 정밀한 시각동기화 기능을 갖추어야 한다. 만약, Process bus 시스템의 문제로 인해, 지연과 손실이 발생한다면 변전소 보호 제어에 영향을 줄 수 있으므로 Process bus를 디지털변전소에 적용하기 위해서는 Process bus 기반의 네트워크시스템에 연결된 MU와 IED가 송수신하는 SV와 GOOSE를 손실과 지연없이 전송할 수 있는지를 분석해야 한다. 본 연구에서는 디지털변전소 네트워크 시뮬레이션 시험을 통해, 배전선로용 통합 IED의 성능검증을 위해 Process bus 네트워크 시스템을 설계하고 시뮬레이션 시험을 수행하여 이를 통해 향후 국내의 Process bus 디지털변전시스템 구축을 위한 효과적인 네트워크 시스템 설계방법을 제시하고자 한다.