• Journal of electromagnetic engineering and science
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• 제7권2호
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• pp.64-68
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• 2007

An InGaP/GaAs HBT based differential Colpitts voltage control oscillator(VCO) is presented in this paper. In the VCO core, two switching transistors are introduced to steer the core bias current to save power. An LC tank with an inductor quality factor(Q) of 11.4 is used to generate oscillation frequency. It has a superior phase noise characteristics of -130.12 dBc/Hz and -105.3 at 1 MHz and 100 kHz frequency offsets respectively from the carrier frequency(1.566 GHz) when supplied with a control voltage of 0 volt. It dissipates output power of -5.3 dBm. Two pairs of on-chip base collector (BC) diodes are used in the tank circuit to increase the VCO tuning range(168 MHz). This VCO occupies the area of $1.070{\times}0.90mm^2$ including buffer and pads.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.767-770
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• 2003

A SiGe HBT MMIC differential VCO has been developed for C-band wireless LAN applications. The VCO produces -6.4 dBm output power at 4.75 GHz. The VCO exhibits a 490 MHz tuning range with control voltage from 0.5 V to 2.5 V. The phase noise of the VCO exhibits -106.5 dBc/Hz at 1 MHz offset from the 4.75 GHz carrier. The total current consumption of the VCO is 10 mA at a supply voltage of 3 V.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권3호
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• pp.207-212
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• 2013

A new CMOS voltage-bias differential LC voltage-controlled oscillator (LC-VCO) with active source degeneration is proposed. The proposed degeneration technique preserves the quality factor of the LC-tank which leads to improvement in phase noise of VCO oscillators. The proposed VCO shows the high figure of merit (FOM) with large tuning range, low power, and small chip size compared to those of conventional voltage-bias differential LC-VCO. The proposed VCO implemented in 0.18-${\mu}m$ CMOS shows the phase noise of -118 dBc/Hz at 1 MHz offset oscillating at 5.03 GHz, tuning range of 12%, occupies 0.15 $mm^2$ of chip area while dissipating 1.44 mW from 0.8 V supply.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년 학술대회 논문집 정보 및 제어부문
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• pp.479-481
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• 2006

This paper describes a 2.5V, 320MHz low-noise and low-power Phase Locked Loop(PLL) using a noise-rejected Voltage Controlled ring Oscillator(VCO) fabricated in a TSMC 0.25um CMOS technology. In order to improve the power consumption and oscillation frequency of the PLL, The VCO consist of three-stage fully differential delay cells that can obtain the characteristic of high speed, low power and low phase noise. The VCO operates at 7MHz -670MHz. The oscillator consumes l.58mA from a 320MHz frequency and 2.5V supply. When the PLL with fully-differential ring VCO is locked 320MHz, the jitter and phase noise measured 26ps (rms), 157ps (p-p) and -97.09dB at 100kHz offset. We introduce and analysis the conditions in which ring VCO can oscillate for low-power operation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 G
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• pp.3184-3186
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• 1999

In this paper, a new structure of fully differential delay cell VCO using quadrature phase for low phase noise and high speed operation is suggested. It is realized by inserting voltage clamp circuit into input pairs of delay cells that include three-control current source having high output impedance. In this reason. this newly designed delay cell for VCO has the low power supply sensitivity so that the phase noise can be reduced. The whole characteristics of VCO were simulated by using HSPICE and SABER. Simulation results show that the phase noise of new VCO is quite small compared with conventional fully differential delay cell VCO and ring oscillator type VCO. It is also very beneficial to low power supply design because of wide tuning range.

• ETRI Journal
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• 제34권4호
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• pp.518-526
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• 2012

This paper proposes LC voltage-controlled oscillator (VCO) phase-locked loop (PLL) and ring-VCO PLL topologies with low-phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer-resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out-band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65-nm or 45-nm process. The measured results of the LC-VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of -118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring-VCO PLL shows a phase noise of -95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.

• 한국ITS학회:학술대회논문집
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• 한국ITS학회 2008년도 제7회 추계학술대회 및 정기총회
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• pp.376-379
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• 2008

• Journal of electromagnetic engineering and science
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• 제6권2호
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• pp.92-97
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• 2006

In this paper, a fully integrated Ku-band tripler differential MMIC voltage controlled oscillator(VCO), which consists of a differential VCO core and two triplers, is developed using high linearity InGaP/GaAs HBT technology. The VCO core generates an oscillation frequency of 3.583 GHz, an output power of 3.65 dBm, and a phase noise of -96.7 dBc/Hz at 100 kHz offset with a current consumption of 30 mA at a supply voltage of 2.9 V. The tripler shows excellent side band rejection of 23 dBc at 3 V and 12 mA. The tripler differential MMIC VCO produces an oscillation frequency of 10.75 GHz, an output power of -13 dBm and a phase noise of -89.35 dBc/Hz at 100 kHz offset.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권2호
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• pp.83-87
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• 2004

Phase noise performance and current consumption of Radio Frequency (RF) Voltage-Controlled Oscillator (VCO) are largely dependent on the Quality (Q) factor of inductor-capacitor (LC) tank. Because the Q-factor of LC tank is determined by on-chip spiral inductor, we designed, analyzed, and modeled on-chip differential inductor to enhance differential Q-factor, reduce current consumption and save silicon area. The simulated inductance is 3.3 nH and Q-factor is 15 at 2 GHz. Self-resonance frequency is as high as 13 GHz. To verify its use to RF applications, we designed 2 GHz differential LC VCO. The measurement result of phase noise is -112 dBc/Hz at an offset frequency of 100 kHz from a 2GHz carrier frequency. Tuning range is about 500 MHz (25%), and current consumption varies from 5mA to 8.4 mA using bias control technique. Implemented in $0.35-{\mu}m$ SiGe BiCMOS technology, the VCO occupies $400\;um{\times}800\;um$ of silicon area.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.21-24
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• 2002

This paper presents a fully integrated, wide tuning range differential CMOS voltage-controlled oscillator, tuned by pMOS-varactors. VCO utilizing a novel tuning scheme is reported. Both coarse digital tuning and fine analog tuning are achieved using pMOS-varactors. The VCO were implemented in a 0.18-fm standard CMOS process. The VCO tuned from 1.8㎓ to 2.55㎓ through 2-bit digital and analog input. At 1.8V power supply voltage and a total power dissipation of 8mW, the VCO features a phase noise of -126㏈c/㎐ at 3㎒ frequency offset.