• 제목/요약/키워드: Differential Input

검색결과 470건 처리시간 0.022초

Source-Coupled Backgate쌍을 이용한 CMOS 차동입력단의 특성 (Characteistics of a CMOS Differential Input-Stage Using a Source-Coupled Backgate Pair)

  • 강욱;이원형;한우종;김수원
    • 전자공학회논문지A
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    • 제28A권1호
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    • pp.40-45
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    • 1991
  • It is well known that the conventional differential source-coupled pair uses gates as its input terminals. This input pair provids a high open-loop gain, a large CMRR, and a good PSRR. For these reasons, the input pair has been used widely as an input stages of the differential amplifiers, but a narrow linear input range of this structurelimits its application in the area of some analog circuit design. A novel CMOS source-coupled backgate pair is proposed in this paper. The bulk of MOSFET is exploited and input devices are biased to operate in ohmic region. With this topology, the backgate pair of the wide linear input range and variable transconductance can be obtained. This backgate input differential stage is realized with the size of W/L=50/25 MOSFETs. The results show the nonlinear error is less than $\gamma$1% over 10V full-scale range for the bias current of 200$\mu$A with 10V single power-supply.

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차동기어장치를 적용한 입력축 연결방식 무단변속기의 동력흐름 및 효율해석에 관한 연구 (Power Flow and Efficiency of Input Coupled type CVT combined Differential Gear Unit)

  • 김연수;최상훈
    • 한국정밀공학회지
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    • 제17권11호
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    • pp.141-150
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    • 2000
  • Continuously variable transmission(CVT) combined differential gear unit has many advantages, which are the decrease of CVT size, the increase of overall efficiency, the extension of speed ratio range, and the generation of geared neutral. It is known that such CVT can be classified into the input coupled type and the output coupled type according to the coupling location of continuously variable unit(CVU). In this paper, six different configurations of input coupled type CVT combined V-belt CVU and 2K-H I type differential gear unit are proposed. Some useful theoretical formula related to speed ratio, power flow and efficiency are derived and analyzed. The propriety of derived formula and theoretical analysis are proven by various experiments.

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모터 제어 입력 제한 조건이 고려된 차륜 이동 로봇을 위한 효율적인 최소 시간 코너링(Cornering) 주행 계획 (Efficient Minimum-Time Cornering Motion Planning for Differential-Driven Wheeled Mobile Robots with Motor Control Input Constraint)

  • 김재성;김병국
    • 제어로봇시스템학회논문지
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    • 제19권1호
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    • pp.56-64
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    • 2013
  • We propose an efficient minimum-time cornering motion planning algorithms for differential-driven wheeled mobile robots with motor control input constraint, under piecewise constant control input sections. First, we established mobile robot's kinematics and dynamics including motors, divided the cornering trajectory for collision-free into one translational section, followed by one rotational section with angular acceleration, and finally the other rotational section with angular deceleration. We constructed an efficient motion planning algorithm satisfying the bang-bang principle. Various simulations and experiments reveal the performance of the proposed algorithm.

Hot carrier 현상에 의한 CMOS 차동 증폭기의 성능 저하 (The performance degradation of CMOS differential amplifiers due to hot carrier effects)

  • 박현진;유종근;정운달;박종태
    • 전자공학회논문지D
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    • 제34D권7호
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    • pp.23-29
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    • 1997
  • The performance degradation of CMOS differential amplifiers due to hot carrier effect has been measured and analyzed. Two-state CMOS amplifiers whose input transistors are PMOSFETs were designed and fabriacted using the ISRC CMOS 1.5.mu.m process. It was observed after the amplifier was hot-carrier stressed that the small-signal voltage gain and the input offset voltage increased and the phase margin decreased. The performance variation results from the increase of the transconductances and gate capacitances of the PMOSFETs used as input transistors in the differential input stage and the output stage and also resulted from the decrease of their output conductances. After long-term stress, the amplifier became unstable. The reason might be that its phase margin was reduced due to hot carrier effect.

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Single-ended Differential RF Circuit Topologies Utilizing Complementary MOS Devices

  • Kim, Bonkee;Ilku Nam;Lee, Kwyro
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권1호
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    • pp.7-18
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    • 2002
  • Single-ended differential RF circuit topologies fully utilizing complementary characteristics of both NMOS and PMOS are proposed, which have inherent advantage of both single-ended and differential circuits. Using this concept, we propose a CCPP (Complementary CMOS parallel push-pull) amplifier which has single-ended input/output with differential amplifying characteristics, leading to more than 30 dB improvement on $IIP_2$. In addition, complementary resistive mixer is also proposed, which provides not only differential IF outputs from single-ended RF input, but much better linearity as well as isolation characteristics. Experimental results using $0.35{\;}\mu\textrm{m}$ CMOS process show that, compared with conventional NMOS resistive mixer, the proposed mixer shows 15 dB better LO-to-IF isolation, 4.6 dB better $IIP_2$, and 4.5 dB better $IIP_3$performances.

Experimental Study on the Input Coupled type CVT combined a Differential Gear and V-Belt type CVU

  • Kim, Yeon-Su;Park, Sang-Hoon
    • International Journal of Precision Engineering and Manufacturing
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    • 제2권1호
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    • pp.43-55
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    • 2001
  • A continuously variable transmission(CVT) mechanism composed of one differential gear unit and one continuously variable unit(CVU) can be classified according to the coupling of CVU and the direction of power flows. The mechanism has many advantages which are the decrease of CVT size, the increase of overall efficiency, the extension of speed ratio range and generation of geared neutral. The CVT mechanism considered here is the input coupled type which combines the functions of a 2K-H I type differential gear unit and a V-belt type CVU. One shaft of the CVU is connected directly to the input shaft and another shaft of it is linked to the differential gear unit. It is shown that some fundamental relations(speed ratios, power flows and efficiencies) for twelve mechanisms previously described are valid by various experimental studies, six of them produce a power circulation and the others produce a power split. Some useful comparisons between theoretical analysis and experimental results are presented. General properties also are discussed, which connect following power flow modes : (a) power circulation mode; (b) power split mode.

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전류 컨베어 회로를 이용한 차동전압-주파수 변환기의 설계 (Design of Differential Voltage-to-Frequency Converter Using Current Conveyor Circuit)

  • 최진호
    • 한국정보통신학회논문지
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    • 제15권4호
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    • pp.891-896
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    • 2011
  • 이 논문에서는 전류 컨베이어 회로를 이용하여 입력 전압의 차에 비례하는 주파수 신호를 생성하는 회로를 설계하였다. 설계된 회로는 HSPICE를 이용하여 회로의 동작을 분석하였으며, 입력 전압 차는 수V에서 수mV 단위까지 변화시키면서 출력 주파수를 시뮬레이션하였다. 회로의 시뮬레이션 결과 이론적인 계산값과 비교하였을 때 에러는 -1.9%에서 +1.8% 이내였다.

Soft-Decision for Differential Amplify-and-Forward over Time-Varying Relaying Channel

  • Gao, Fengyue;Kong, Lei;Dong, Feihong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제10권3호
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    • pp.1131-1143
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    • 2016
  • Differential detection schemes do not require any channel estimation, which can be employed under user mobility with low computational complexity. In this work, a soft-input soft-output (SISO) differential detection algorithm is proposed for amplify-and-forward (AF) over time-varying relaying channels based cooperative communications system. Furthermore, maximum-likelihood (ML) detector for M-ary differential Phase-shift keying (DPSK) is derived to calculate a posteriori probabilities (APP) of information bits. In addition, when the SISO is exploited in conjunction with channel decoding, iterative detection and decoding approach by exchanging extrinsic information with outer code is obtained. Finally, simulation results show that the proposed non-coherent approach improves detection performance significantly. In particular, the system can obtain greater performance gain under fast-fading channels.

CMOS 선형 가변 트랜스컨덕터 (A CMOS Linear Tunable Transconductor)

  • 임태수;최태섭;사공석진
    • 전자공학회논문지C
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    • 제35C권11호
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    • pp.57-62
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    • 1998
  • 본 논문에서는 넓은 입력 전압 범위에 걸쳐 좋은 선형성을 보여주는 가변 트랜스컨덕터를 제안한다. 제안된 트랜스컨덕터는 선형 영역에서 동작하는 입력 MOS 트랜지스터를 사용하여 회로의 구성이 간단하고 좋은 가변성을 갖고 6.8V/sub p-p/의 넓은 입력범위를 갖는다. 또한 소오스-결합 차동쌍을 이용하여 실질적인 차동입력을 제공하고 정과 부의 트랜스컨덕턴스 값을 제공한다. 제안된 회로는 1.2㎛ single poly double metal n-well CMOS 공정을 사용하여 제작되었다. 제안된 회로의 THD 특성은 V/sub DD/=-V/sub ss/=5V, I/sub B/=20, 40μA이고 입력 신호 주파수가 1KHz일 때 6V/sub p-p/의 차동 입력전압에 대해 1% 미만임을 보여준다.

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New Fully-Differential CMOS Second-Generation Current Conveyer

  • Mahmoud, Soliman A.
    • ETRI Journal
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    • 제28권4호
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    • pp.495-501
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    • 2006
  • This paper presents a new CMOS fully-differential second-generation current conveyor (FDCCII). The proposed FDCCII is based on a fully-differential difference transconductor as an input stage and two class AB output stages. Besides the proposed FDCCII circuit operating at a supply voltage of ${\pm}1.5\;V$, it has a total standby current of $380\;{\mu}A$. The applications of the FDCCII to realize a variable gain amplifier, fully-differential integrator, and fully-differential second-order bandpass filter are given. The proposed FDCII and its applications are simulated using CMOS $0.35\;{\mu}m$ technology.

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