• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1045-1048
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• 2003

In this paper, we studied plasma damage of MIS capacitor with $Al_2$O$_3$ dielectric film. Using capacitor pattern with the same area but different perimeters, we tried to separate etching damage mechanism and to optimize the dry etching process. After etching both metal and dielectric layer by the same condition, leakage current and C-V measurements were carried out for Pt/A1$_2$O$_3$/Si structures. The flatband voltage shift was appeared in the C-V plot, and it was caused by the variation of the fixed interface charge and the interface trapped charge. From I-V measurement, it was found the leakage current along the periphery could not be ignored. Finally, we established the process condition of RF power 300W, 100mTorr, Ar/Cl$_2$ gas 60sccm as an optimal etching condition.

• 마이크로전자및패키징학회지
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• 제7권3호
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• pp.13-17
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• 2000

ECR (Electron Cyclotron Resonance) 식각 공정에 따른 층간 절연막 폴리이미드의 전기적 특성에 관하여 연구하였다. 알루미늄 식각시 일반적으로 사용되는 $Cl_2$플라즈마는 폴리이미드의 유전상수 값을 증가시킨 반면에 $SF_{6}$플라즈마의 경우는 높은 식각률과 유전상수 값의 감소를 가져왔다. 폴리이미드의 누설 전류는 ECR 식각 공정 후에 감소되었다. 다중 금속화 구조를 구현하는데 있어 $Cl_2$플라즈마를 사용하여 알루미늄을 식각하고 $SF_{6}$ 플라즈마를 사용하여 폴리이미드를 식각하는 것이 최적일 것으로 판단된다.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제51권9호
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• pp.413-416
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• 2002

It was reported that low temperature plasma developed by our group was apparently homogeneous and stable at atmospheric pressure, and was generated if the alumina was used as a dielectric insulating material and Ar gas as a plasma gas. This is a structure in which the dielectric materials are covered and arranged in parallel in the one side of electrode. In this experiment, we discovered that dielectric material was important to generate normal electric discharge. To examine the effect of dielectric material on the electric discharge characteristic, the voltage and current of the plasma was measured and the electrical effect of dielectric material was examined. Also, it was applied to an etching of tin oxide films.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
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• pp.87-96
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• 2000

The properties of polyimide for interlayer dielectric applications are investigated during plasma etching of aluminum on it. Chlorine-based plasma generally used for aluminum etching results in an increase in the (dielectric constant of polyimide, while $SF_6$ plasma exhibits a high polyimide etch rate and a reducing effect of the dielectric constant. The leakage current of polyimide is significantly suppressed after plasma exposure. An optimal combination of Al etch with $Cl_6$ plasma and polyimide etch with $SF_6$ plasma is expected to be a good tool for realizing multilevel metallization structures.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1997년도 추계학술대회 논문집
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• pp.935-938
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• 1997

Recently, the minimum line width shows a tendency to decrease and the multi-level increase in semiconductor. Therefore, a planarization technique is needed and chemical mechanical polishing(CMP) is considered as one of the most suitable process. CMP accomplishes a high polishing performance and a global planarization of high quality. But there are several defects in CMP such as micro-scratches, abrasive contaminations, and non-uniformity of polished wafer edges. Wet etching include of Spin-etching can improve he defects of CMP. It uses abrasive-free chemical solution instead of slurry. On this study, ILD(INterlayer-Dielectric) was removed by CMP and wet-etching methods in order to investigate the superiority of wet etching mechanism. In the thin film wafer, the results were evaluated at a viewpoint of material removal rate(MRR) and within wafer non-uniformity(WIWNU). And pattern step height was also compared for planarization characteristics of the patterned wafer.

• 마이크로전자및패키징학회지
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• 제6권1호
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• pp.75-79
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• 1999

차세대 저유전상수 층간 절연막중 하나로 대두되고 있는 polyimide를 플라즈마에 노출시키고 이때 나타나는 전기적 특성변화를 살펴보았다. polyimide를 알루미늄 식각시 사용되고 있는 Cl-based 플라즈마에 노출시켰을때 유전상수가 약간 증가함을 볼 수 있었고, F-based 플라즈마로 $SF_{6}$ 플라즈마에 노출시켰을 때는 유전상수 감소를 볼 수 있었다. 이는 fluorine또는 chlorine bond의 생성과 관련된 것으로 FTIR과 XPS분석을 통해 확인할 수 있었다. 따라서 Cl-based 플라즈마로 알루미늄 식각 후 $SF_{6}$플라즈마에 노출시킴으로써 이 부식문제의 해결뿐만 아니라 po1yimide의 유전상수도 낮출 수 있으리라 기대된다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 춘계학술대회 논문집 전자세라믹스 센서 및 박막재료 반도체재료 일렉트렛트 및 응용기술
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• pp.56-59
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• 2000

In this study, Ferroelectric $Pb(Zr_x,Ti_{1-x})O_3$(x=0.53) thin films were fabricated by the spin-coating on the Pt/Ti/$SiO_2$/Si substrate using the PZT metal alkoxide solutions with various excess Pb contents. Etching of PZT film was performed using planar inductively coupled Ar(20)$/Cl_2/BCl_3$ plasma. The etch rate of PZT film was 2450 ${\AA}/min$ at Ar(20)$/BCl_3$(80) gas mixing ratio and substrate temperature of $80^{\circ}C$. The leakage current densities of before etching and after etching PZT thin film were $6.25\times10^{-8}A/cm^2$, $8.74\times10^{-7}A/cm^2$ with electric field of 0.07MV/em, respectively.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.139.2-139.2
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• 2013

6" Multi-crystal Silicon wafer has etched suing a remote - type RF Dielectric barrier discharge (RF DBD) at atmospheric pressure. DBD source is composed of Al electrode and coated Al2O3 dielectric as function of Ar/NF3 gas combination and input power used 13.56 MHz power supply. Ar gas flow rate is changed from 2 to 10 Slm, and NF3 flow rate is changed from 0.2~1 slm. At the result, NF3 flow rate Si etching rate also increase whit the increasing of NF3 flow rate But at 2 slm etching rate was decrease. In this experience, Max etching rate is 2.3 ${\mu}m/min$ when the scan time is 45 sec.

• ETRI Journal
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• 제27권3호
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• pp.304-311
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• 2005

We report on the fabrication of an AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) using a dielectric-defined process. This process was utilized to fabricate $0.12\;{\mu}m\;{\times}\;100 {\mu}m$ T-gate PHEMTs. A two-step etch process was performed to define the gate footprint in the $SiN_x$. The $SiN_x$ was etched either by dry etching alone or using a combination of wet and dry etching. The gate recessing was done in three steps: a wet etching for removal of the damaged surface layer, a dry etching for the narrow recess, and wet etching. A structure for the top of the T-gate consisting of a wide head part and a narrow lower layer part has been employed, taking advantage of the large cross-sectional area of the gate and its mechanically stable structure. From s-parameter data of up to 50 GHz, an extrapolated cut-off frequency of as high as 104 GHz was obtained. When comparing sample C (combination of wet and dry etching for the $SiN_x$) with sample A (dry etching for the $SiN_x$), we observed an 62.5% increase of the cut-off frequency. This is believed to be due to considerable decreases of the gate-source and gate-drain capacitances. This improvement in RF performance can be understood in terms of the decrease in parasitic capacitances, which is due to the use of the dielectric and the gate recess etching method.

• 한국재료학회지
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• 제11권11호
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• pp.923-928
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• 2001

An electrolytic silver plating process has been successfully developed for terminated electrode parts of dielectric ceramic resonator. High adhesion strength and high Qu is obtained and blister occurance is minimized under plating condition with $HNO_3$750 $m\ell/\ell$ and HF $ 250m\ell/\ell$ solution at $25^{\circ}C$ for 20 minutes. Adhesion strength has the highest value, 3.2 kg/mm$^2$ at etching temperature of $25^{\circ}C$. Adhesion strength, Qu and blister occurance are monotonically increased with the thickness of electrodeposition layer. In case of electrodeposition of Ag, Qu value of 380 has obtained higher than in case of electrolytic Cu plating with Qu value of 325. Therefore, terminated electrode parts of dielectric ceramic resonator reducing dielectric loss can be obtained using prensent process.