• Title/Summary/Keyword: Dielectric Etching

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Plasma Etching Damage of High-k Dielectric Layer of MIS Capacitor (High-k 유전박막 MIS 커패시터의 플라즈마 etching damage에 대한 연구)

  • 양승국;송호영;오범환;이승걸;이일항;박새근
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1045-1048
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    • 2003
  • In this paper, we studied plasma damage of MIS capacitor with $Al_2$O$_3$ dielectric film. Using capacitor pattern with the same area but different perimeters, we tried to separate etching damage mechanism and to optimize the dry etching process. After etching both metal and dielectric layer by the same condition, leakage current and C-V measurements were carried out for Pt/A1$_2$O$_3$/Si structures. The flatband voltage shift was appeared in the C-V plot, and it was caused by the variation of the fixed interface charge and the interface trapped charge. From I-V measurement, it was found the leakage current along the periphery could not be ignored. Finally, we established the process condition of RF power 300W, 100mTorr, Ar/Cl$_2$ gas 60sccm as an optimal etching condition.

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Electrical Properties of Interlayer Low Dielectric Polyimide with Electron Cyclotron Resonance Etching Process (ECR 식각 공정에 따른 층간절연막 폴리이미드의 전기적 특성)

  • 김상훈;안진호
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.3
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    • pp.13-17
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    • 2000
  • The electrical properties of polyimide for interlayer dielectric applications are investigated with ECR (Electron Cyclotron Resonance) etching process. ECR etching with $Cl_2$-based plasma, generally used for aluminum etching, results in an increase in the dielectric constant of polyimide, while $SF_{6}$ plasma exhibits a high polyimide etch rate and a reducing effect of the dielectric constant. The leakage current of the polyimide is significantly suppressed after plasma exposure. Combination of Al etching with $Cl_2$plasma and polyimide etching with $SF_{6}$ plasma is expected as a good tool for realizing the multilevel metallization structures.

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Generation of Low Temperature Plasma and Its Application (저온 플라즈마 발생과 응용)

  • Lee, Bong-Ju
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.9
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    • pp.413-416
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    • 2002
  • It was reported that low temperature plasma developed by our group was apparently homogeneous and stable at atmospheric pressure, and was generated if the alumina was used as a dielectric insulating material and Ar gas as a plasma gas. This is a structure in which the dielectric materials are covered and arranged in parallel in the one side of electrode. In this experiment, we discovered that dielectric material was important to generate normal electric discharge. To examine the effect of dielectric material on the electric discharge characteristic, the voltage and current of the plasma was measured and the electrical effect of dielectric material was examined. Also, it was applied to an etching of tin oxide films.

Properties of Interlayer Low Dielectric Polyimide during Aluminum Etching with Electron Cyclotron Resonance Etcher System

  • Kim, Sang-Hoon;Ahn, Jin-Ho
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.04a
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    • pp.87-96
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    • 2000
  • The properties of polyimide for interlayer dielectric applications are investigated during plasma etching of aluminum on it. Chlorine-based plasma generally used for aluminum etching results in an increase in the (dielectric constant of polyimide, while $SF_6$ plasma exhibits a high polyimide etch rate and a reducing effect of the dielectric constant. The leakage current of polyimide is significantly suppressed after plasma exposure. An optimal combination of Al etch with $Cl_6$ plasma and polyimide etch with $SF_6$ plasma is expected to be a good tool for realizing multilevel metallization structures.

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A Study on a Wet etching of ILD (Interlayer Dielectric) Film Wafer (습식 에칭에 의한 웨이퍼의 층간 절연막 가공 특성에 관한 연구)

  • 김도윤;김형재;정해도;이은상
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1997.10a
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    • pp.935-938
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    • 1997
  • Recently, the minimum line width shows a tendency to decrease and the multi-level increase in semiconductor. Therefore, a planarization technique is needed and chemical mechanical polishing(CMP) is considered as one of the most suitable process. CMP accomplishes a high polishing performance and a global planarization of high quality. But there are several defects in CMP such as micro-scratches, abrasive contaminations, and non-uniformity of polished wafer edges. Wet etching include of Spin-etching can improve he defects of CMP. It uses abrasive-free chemical solution instead of slurry. On this study, ILD(INterlayer-Dielectric) was removed by CMP and wet-etching methods in order to investigate the superiority of wet etching mechanism. In the thin film wafer, the results were evaluated at a viewpoint of material removal rate(MRR) and within wafer non-uniformity(WIWNU). And pattern step height was also compared for planarization characteristics of the patterned wafer.

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Effect of the Cl-based Plasma for Al Etching on the Interlayer Low Dielectric Polyimide (염소 플라즈마를 이용한 알루미늄 식각 공정이 저유전상수 층간절연막 polyimide에 미치는 영향)

  • 문호성;김상훈;이홍구;우상균;김경석;안진호
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.1
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    • pp.75-79
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    • 1999
  • We have studied electrical properties of polyimide for the next generation interlayer low dielectric during plasma etching. Dielectric constant of polyimide exposed to Cl-based plasma, which is used in aluminum etching, increased, while that of polyimide exposed to $SF_{6}$ plasma decreased. The results are related to fluorine or chlorine bonds as examined by FTIR ana XPS analyses. So, we expect that Cl-based 1)miasma etching of aluminum followed by $SF_{6}$ plasma exposure results in the prevention of post-etch corrosion and decrease of dielectric constant.

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A study on the Etching and Dielectric Properties of PZT Thin Films with Excess Pb Contents (Pb 함량에 따른 PZT 박막의 식각 및 유전특성에 관한 연구)

  • Kim, Kyoung-Tae;Lee, Sung-Gap;Kim, Chang-Il;Lee, Young-Hie
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04b
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    • pp.56-59
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    • 2000
  • In this study, Ferroelectric $Pb(Zr_x,Ti_{1-x})O_3$(x=0.53) thin films were fabricated by the spin-coating on the Pt/Ti/$SiO_2$/Si substrate using the PZT metal alkoxide solutions with various excess Pb contents. Etching of PZT film was performed using planar inductively coupled Ar(20)$/Cl_2/BCl_3$ plasma. The etch rate of PZT film was 2450 ${\AA}/min$ at Ar(20)$/BCl_3$(80) gas mixing ratio and substrate temperature of $80^{\circ}C$. The leakage current densities of before etching and after etching PZT thin film were $6.25\times10^{-8}A/cm^2$, $8.74\times10^{-7}A/cm^2$ with electric field of 0.07MV/em, respectively.

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High Speed Etching for Saw Damage Removal Using by RF DBD

  • Go, Min-Guk;Yang, Jong-Geun;Lee, Heon-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.139.2-139.2
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    • 2013
  • 6" Multi-crystal Silicon wafer has etched suing a remote - type RF Dielectric barrier discharge (RF DBD) at atmospheric pressure. DBD source is composed of Al electrode and coated Al2O3 dielectric as function of Ar/NF3 gas combination and input power used 13.56 MHz power supply. Ar gas flow rate is changed from 2 to 10 Slm, and NF3 flow rate is changed from 0.2~1 slm. At the result, NF3 flow rate Si etching rate also increase whit the increasing of NF3 flow rate But at 2 slm etching rate was decrease. In this experience, Max etching rate is 2.3 ${\mu}m/min$ when the scan time is 45 sec.

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A Comparative Study of a Dielectric-Defined Process on AlGaAs/InGaAs/GaAs PHEMTs

  • Lim, Jong-Won;Ahn, Ho-Kyun;Ji, Hong-Gu;Chang, Woo-Jin;Mun, Jae-Kyoung;Kim, Hae-Cheon;Cho, Kyoung-Ik
    • ETRI Journal
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    • v.27 no.3
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    • pp.304-311
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    • 2005
  • We report on the fabrication of an AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) using a dielectric-defined process. This process was utilized to fabricate $0.12\;{\mu}m\;{\times}\;100 {\mu}m$ T-gate PHEMTs. A two-step etch process was performed to define the gate footprint in the $SiN_x$. The $SiN_x$ was etched either by dry etching alone or using a combination of wet and dry etching. The gate recessing was done in three steps: a wet etching for removal of the damaged surface layer, a dry etching for the narrow recess, and wet etching. A structure for the top of the T-gate consisting of a wide head part and a narrow lower layer part has been employed, taking advantage of the large cross-sectional area of the gate and its mechanically stable structure. From s-parameter data of up to 50 GHz, an extrapolated cut-off frequency of as high as 104 GHz was obtained. When comparing sample C (combination of wet and dry etching for the $SiN_x$) with sample A (dry etching for the $SiN_x$), we observed an 62.5% increase of the cut-off frequency. This is believed to be due to considerable decreases of the gate-source and gate-drain capacitances. This improvement in RF performance can be understood in terms of the decrease in parasitic capacitances, which is due to the use of the dielectric and the gate recess etching method.

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Surface Treatment of Dielectric Ceramic Resonator for High Frequency Devices (고주파용 유전체 세라믹 공진기의 표면처리)

  • Park, Hae-Duck;Kang, Sung-Goon
    • Korean Journal of Materials Research
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    • v.11 no.11
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    • pp.923-928
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    • 2001
  • An electrolytic silver plating process has been successfully developed for terminated electrode parts of dielectric ceramic resonator. High adhesion strength and high Qu is obtained and blister occurance is minimized under plating condition with $HNO_3$750 $m\ell/\ell$ and HF $ 250m\ell/\ell$ solution at $25^{\circ}C$ for 20 minutes. Adhesion strength has the highest value, 3.2 kg/mm$^2$ at etching temperature of $25^{\circ}C$. Adhesion strength, Qu and blister occurance are monotonically increased with the thickness of electrodeposition layer. In case of electrodeposition of Ag, Qu value of 380 has obtained higher than in case of electrolytic Cu plating with Qu value of 325. Therefore, terminated electrode parts of dielectric ceramic resonator reducing dielectric loss can be obtained using prensent process.

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