• Title/Summary/Keyword: Detection Circuit

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Implementation of ATE to Maintain Pre-Amplifier of Thermal Imaging System (열상장비 전단증폭부 정비용 ATE의 구현)

  • Park, Jai-Hyo;Kim, Han-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.49 no.1
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    • pp.80-87
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    • 2012
  • We have developed the ATE(Automatic Test Equipment) system for the performance test of pre-amplifier of thermal imaging devices. The device regenerates the electronic signals of photon detection module which is normally in weak energy, for the image signals processing. Previous ATE system was primarily and actively developed in the field of semiconductor devices quality parts inspection. Recently, it has been studied in the field of performance testing of equipment. In the field of thermal performance test equipment, however, it lacks the study of ATE compared to other areas, which causes the maintenance related to the core of military thermal imaging system maintenance to be limited. In this paper, a new study of ATE in the field of thermal imaging system is done. It is designed to be used universally for the ATE system with different types of circuit card of thermal imaging system by adopting matrix relays. Using the developed ATE measuring the pre-amplifier amplitude, an average amplified amplitude of 2.71Vpp was measured which confirms that it is within the range of theoretical analysis and also verifies the good performance of the developed ATE.

A New Test Algorithm for Bit-Line Sensitive Faults in High-Density Memories (고집적 메모리에서 BLSFs(Bit-Line Sensitive Faults)를 위한 새로운 테스트 알고리즘)

  • Kang, Dong-Chual;Cho, Sang-Bock
    • Journal of IKEEE
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    • v.5 no.1 s.8
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    • pp.43-51
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    • 2001
  • As the density of memories increases, unwanted interference between cells and coupling noise between bit-lines are increased. And testing high-density memories for a high degree of fault coverage can require either a relatively large number of test vectors or a significant amount of additional test circuitry. So far, conventional test algorithms have focused on faults between neighborhood cells, not neighborhood bit-lines. In this paper, a new test algorithm for neighborhood bit-line sensitive faults (NBLSFs) based on the NPSFs(Neighborhood Pattern Sensitive Faults) is proposed. And the proposed algorithm does not require any additional circuit. Instead of the conventional five-cell or nine-cell physical neighborhood layouts to test memory cells, a three-cell layout which is minimum size for NBLSFs detection is used. Furthermore, to consider faults by maximum coupling noise by neighborhood bit-lines, we added refresh operation after write operation in the test procedure(i.e.,$write{\rightarrow}\;refresh{\rightarrow}\;read$). Also, we show that the proposed algorithm can detect stuck-at faults, transition faults, coupling faults, conventional pattern sensitive faults, and neighborhood bit-line sensitive faults.

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A Study on Optimized Design of Wideband Pulsed Gamma-ray Detectors (광대역 펄스감마선 탐지센서 최적화설계에 관한 연구)

  • Jeong, Sang-hun;Lee, Nam-ho;Son, Eui-seung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.1121-1124
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    • 2015
  • In this paper, we propose and demonstrate an optimal design of wideband pulsed gamma-ray detectors. Pulsed gamma-ray detectors are designed to operate in a dose rate of $1{\times}10^6{\sim}1{\times}10^8rad(Si)/s$. The input parameter was derived based on the energy ratio of pulse gamma-ray spectrum and the time of the energy. The sensor output current was calculated based on the dose rate control circuit. Using the N-type Epi Wafer, the optimum condition detection sensor was designed based on TCAD. The simulation results show that the optimal Epi layer thickness is 45um when applied voltage 3.3V. The doping concentrations are as follows : N-type is an Arsenic as $1{\times}10^{19}/cm^3$, P-type is a Boron as $1{\times}10^{19}/cm^3$ and Epi layer is Phosphorus as $3.4{\times}10^{12}/cm^3$. Pulse gamma-ray detector diameter is the 1.3mm.

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SoC Design for Malicious Circuit Attack Detection Using on-Chip Bus (온칩버스를 이용한 악성 회로 공격 탐지 SoC 설계)

  • Guard, Kanda;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.885-888
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    • 2015
  • A secure and effective on-chip bus for detecting and preventing malicious attacks by infected IPs is presented in this paper. Most system inter-connect (on-chip bus) are vulnerable to hardware Trojan (Malware) attack because all data and control signals are routed. A proposed secure bus with modifications in arbitration, address decoding, and wrapping for bus master and slaves is designed using the Advanced High-Performance and Advance Peripheral Bus (AHB and APB Bus). It is implemented with the concept that arbiter checks share of masters and manage infected masters and slaves in every transaction. The proposed hardware is designed with the Xilinx 14.7 ISE and verified using the HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA device. The design has a total gate count of 40K at an operating frequency of 250MHz using the $0.13{\mu}m$ TSMC process.

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An Adaptive-Bandwidth Referenceless CDR with Small-area Coarse and Fine Frequency Detectors

  • Kwon, Hye-Jung;Lim, Ji-Hoon;Kim, Byungsub;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.3
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    • pp.404-416
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    • 2015
  • Small-area, low-power coarse and fine frequency detectors (FDs) are proposed for an adaptive bandwidth referenceless CDR with a wide range of input data rate. The coarse FD implemented with two flip-flops eliminates harmonic locking as long as the initial frequency of the CDR is lower than the target frequency. The fine FD samples the incoming input data by using half-rate four phase clocks, while the conventional rotational FD samples the full-rate clock signal by the incoming input data. The fine FD uses only a half number of flip-flops compared to the rotational FD by sharing the sampling and retiming circuitry with PLL. The proposed CDR chip in a 65-nm CMOS process satisfies the jitter tolerance specifications of both USB 3.0 and USB 3.1. The proposed CDR works in the range of input data rate; 2 Gb/s ~ 8 Gb/s at 1.2 V, 4 Gb/s ~ 11 Gb/s at 1.5 V. It consumes 26 mW at 5 Gb/s and 1.2 V, and 41 mW at 10 Gb/s and 1.5 V. The measured phase noise was -97.76 dBc/Hz at the 1 MHz frequency offset from the center frequency of 2.5 GHz. The measured rms jitter was 5.0 ps at 5 Gb/s and 4.5 ps at 10 Gb/s.

Realization of a High Precision Inspection System for the SOP Types of ICs (SOP형 IC의 고 정밀 외관검사 시스템 구현)

  • Tae Hyo Kim
    • Journal of the Institute of Convergence Signal Processing
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    • v.5 no.2
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    • pp.165-171
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    • 2004
  • Owing to small sizes and high density to the semiconductor It, it is difficult to discriminate the defects of ICs by human eyes. High precision inspection system with computer vision is essentially established for the manufacturing process due to the variety of defective parts. Especially it is difficult to implement the algorithm for the coplanarity of IC leads. Therefore in this paper, the inspection system which can detect the defects of the SOP types of ICs having 1cm${\times}$0.5cm of the chip size is implemented and evaluated it's performance. In order to optimally detect various items, some principles of geometry are theoretically presented , length measurement, pitch measurement, angle measurement, brightness of image and correcton of position. The interface circuit is designed for implementation of inspection system and connected the HANDLER. In the result, the system could detect two ICs' defects per second and confirmed the resolution of 20$\mu$m per pixel.

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Design of Sample Chamber and Implementation of a 4-Channel Electrolyte Analyzer using ISFET Microsensor (ISFET 마이크로센서용 샘플챔버 설계 및 4채널 전해질 분석기의 구현)

  • Bae, Sang-Kon;Lee, Ho-Shin;Won, Chul-Ho;Chae, Seung-Pyo;Kim, Chang-Soo;Cho, Byung-Wook;Sohn, Byung-Ki;Kim, Myoung-Nam;Cho, Jin-Ho
    • Journal of Sensor Science and Technology
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    • v.6 no.4
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    • pp.307-315
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    • 1997
  • In this paper, a sample chamber which provide easy replacement of ISFET sensor and consume only small sample volume for electrolyte analysis is designed and a 4-channel electrolyte analyzer employing 2-point calibration method is implemented. In addition, we proposed sample loading detection circuit for minimizing sample and calibration solutions and implemented it. Developed electrolyte analyzer consists of control system part and flow system part. For the effective control of the developed hardware, system software is developed as three individual routines ; measuring routine, calibration routine and washing routine.

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Corona generated Radio Interference of the 750 kV AC Bundle Conductors in Sandy and Dusty Weather Condition in the High Altitude Area

  • Liu, Yun-Peng;Zhu, Lei;Lv, Fang-Cheng;Wan, Bao-Quan;Pei, Chun-Ming
    • Journal of Electrical Engineering and Technology
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    • v.9 no.5
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    • pp.1704-1711
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    • 2014
  • Sandy and dusty weather condition often occurs in the high altitude areas of China, which may greatly influence the corona generated radio interference (RI) characteristics of the bundle conductors of 750 kV AC power transmission lines. Corona generated RI of the conductors of the 750 kV AC power transmission lines used in practice is measured by EMI receiver with a coupling circuit and a coupling capacitor connected between the high voltage side and the earth side in fine and sandy and dusty condition. The measuring frequency is 0.5 MHz, and the quasi-peak detection is used. RI excitation function is calculated based on the corona RI current measured by the EMI receiver. Corona generated RI characteristics were analyzed from sand concentration and sand particle size. The test result shows that the corona generated RI excitation function is influenced by the sandy and dusty condition. Corona discharge of the conductors is more serious in sandy and dusty condition with an ultraviolet (UV) detector. Corona generated RI excitation function increases with the increase of sand concentration and also increases with the increase of particle size.

Design of Power Detection Block for Wireless Communication Transmitter Systems (무선통신 송신시스템용 전력검출부 설계)

  • Hwang, Mun-Su;Koo, Jae-Jin;Ahn, Dal;Lim, Jong-Sik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.5
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    • pp.1000-1006
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    • 2007
  • This paper presents a power detector circuit which monitors the transmitting power for the application in CDMA cell phones. The proposed power detector are composed of coupler for coupling output power and detector fur monitoring output power. The designed coupler has low loss characteristic because it adopts the stripline structure which consists of two ground planes at both sides of signal plane. The design frequency is 824-849MHz which is the Tx band fur CDMA mobile terminal, and the coupling factor of the stripline coupler is -20dB. A schottky barrier diode is adopted for detector design because of its high speed operation with minimized loss. The required impedance matching is performed to improve the linearity and sensitivity of output voltage at relatively low detector input level where the nonlinear characteristic of diode exists. The package parasitics as well as intrinsic diode model are considered for simulation of the detector. The predicted performances agree well with the measured results.

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Radiation measurement and imaging using 3D position sensitive pixelated CZT detector

  • Kim, Younghak;Lee, Taewoong;Lee, Wonho
    • Nuclear Engineering and Technology
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    • v.51 no.5
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    • pp.1417-1427
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    • 2019
  • In this study, we evaluated the performance of a commercial pixelated cadmium zinc telluride (CZT) detector for spectroscopy and identified its feasibility as a Compton camera for radiation monitoring in a nuclear power plant. The detection system consisted of a $20mm{\times}20mm{\times}5mm$ CZT crystal with $8{\times}8$ pixelated anodes and a common cathode, in addition to an application specific integrated circuit. The performance of the various radioisotopes $^{57}Co$, $^{133}Ba$, $^{22}Na$, and $^{137}Cs$ was evaluated. In general, the amplitude of the induced signal in a CZT crystal depends on the interaction position and material non-uniformity. To minimize this dependency, a drift time correction was applied. The depth of each interaction was calculated by the drift time and the positional dependency of the signal amplitude was corrected based on the depth information. After the correction, the Compton regions of each spectrum were reduced, and energy resolutions of 122 keV, 356 keV, 511 keV, and 662 keV peaks were improved from 13.59%, 9.56%, 6.08%, and 5%-4.61%, 2.94%, 2.08%, and 2.2%, respectively. For the Compton imaging, simulations and experiments using one $^{137}Cs$ source with various angular positions and two $^{137}Cs$ sources were performed. Individual and multiple sources of $^{133}Ba$, $^{22}Na$, and $^{137}Cs$ were also measured. The images were successfully reconstructed by weighted list-mode maximum likelihood expectation maximization method. The angular resolutions and intrinsic efficiency of the $^{137}Cs$ experiments were approximately $7^{\circ}-9^{\circ}$ and $5{\times}10^{-4}-7{\times}10^{-4}$, respectively. The distortions of the source distribution were proportional to the offset angle.