• Journal of information and communication convergence engineering
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• 제6권1호
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• pp.43-46
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• 2008

This paper proposes an advanced test circuit for detecting the connectivity between a drum ring of laser printer and PCB. The detection circuit of charge sharing is proposed, which minimizes the influences of internal parasitic capacitances. The test circuit is composed of precharge circuit, analog comparator, level shifter. Its functional operation is verified using $0.6{\mu}m$ 3.3V/40V CMOS process parameter by HSPICE. Access time is100ns. Layout of the drum contact test circuit is $465{\mu}m\;{\times}\;117{\mu}m$.

• 전력전자학회논문지
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• 제27권2호
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• pp.100-105
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• 2022

This paper applies the arc detection algorithm to prevent the false detection in photo voltaic series arc detection circuit, which is required not only to detect the series arc quickly, but also not falsely detect the arc for the non-arc noise. For this purpose, this study proposes a rapid and preventive false detection method of single peak noise and short noise signals. First, to prevent false detection by single peak noise, Discrete wavelet transform (DWT)-based characteristic parameters are applied to determine the shape and the amplitude of the noise. In addition, arc fault detection within a few milliseconds is performed with the DWT iterative algorithm to quickly prevent false detection for short noise signals, considering the continuity of serial arc noise. Thus, the method operates not only to detect series arc, but also to avoid false arc detection for peak and short noises. The proposed algorithm is applied to real-time serial arc detection circuit based on the TMS320F28335 DSP. The serial arc detection and peak noise filtering performances are verified in the built simulated arc test facility. Furthermore, the filtering performance of short noise generated through DC switch operation is confirmed.

• ETRI Journal
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• 제27권5호
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• pp.539-544
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• 2005

An analog CMOS vision chip for edge detection with power consumption below 20mW was designed by adopting electronic switches. An electronic switch separates the edge detection circuit into two parts; one is a logarithmic compression photocircuit, the other is a signal processing circuit for edge detection. The electronic switch controls the connection between the two circuits. When the electronic switch is OFF, it can intercept the current flow through the signal processing circuit and restrict the magnitude of the current flow below several hundred nA. The estimated power consumption of the chip, with $128{\times}128$ pixels, was below 20mW. The vision chip was designed using $0.25{\mu}m$ 1-poly 5-metal standard full custom CMOS process technology.

• 조명전기설비학회논문지
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• 제24권1호
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• pp.160-166
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• 2010

철도와 도로가 평면 교차하는 개소에서 열차의 진입을 통행자에게 알려 사고를 방지하는 운전보안설비를 건널목 보안장치라 하며, 이 장치는 레일을 전기회로의 일부로 사용하여 회로를 구성하고 철도차량의 차축에 의해 레일사이를 단락함에 따라 열차의 유무를 검지하는 궤도회로장치에 의한 것이 대부분이다. 그 만큼 건널목보안장치에서 궤도회로장치가 중요한 역할을 하지만, 열차운행 횟수 감소로 눈, 비, 습기 등에 의하여 레일에 녹이 발생하여 열차가 궤도회로를 점유하여도 단락감도 불량으로 궤도회로가 낙하되지 않아 건널목보안장치 무경보 발생으로 도로차량과 충돌하는 사고발생이 우려된다. 본 논문에서는 이와 같은 문제점을 보완하기 위하여 열차에 의해 궤도를 단락하는 열차검지방식에서 적외선 센서에 의해 열차접근을 확인하여 건널목보안장치를 제어하는 방식으로 변경하여 열차안전운행을 확보하는 효율적인 안전장치로서의 역할을 수행할 수 있도록 설계 방법을 제안한다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.706-711
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• 2014

A low power 6-bit flash ADC that uses an input voltage range detection algorithm is described. An input voltage level detector circuit has been designed to overcome the disadvantages of the flash ADC which consume most of the dynamic power dissipation due to comparators array. In this work, four digital input voltage range detectors are employed and each input voltage range detector generates the specific clock signal only if the input voltage falls between two adjacent reference voltages applied to the detector. The specific clock signal generated by the detector is applied to turn the corresponding latched comparators on and the rest of the comparators off. This ADC consumes 68.82 mW with a single power supply of 1.2V and achieves 4.3 effective number of bits for input frequency up to 1 MHz at 500 MS/s. Therefore it results in 4.6 pJ/step of Figure of Merit (FoM). The chip is fabricated in 0.13-um CMOS process.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.789-796
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• 2014

A CMOS photo detection bias quenching circuit is developed to be used with single photon avalanche photodiodes (SPADs) operating in Geiger mode for the detection of weak optical signals. The proposed bias quenching circuits for the performance improvement reduce the circuit size as well as improve the performance of the quenching operation. They are fabricated in a $0.18-{\mu}m$ standard CMOS technology to verify the effectiveness of this technique with the chip area of only $300{\mu}m^2$, which is about 60 % of the previous reported circuit. Two types of proposed circuits with resistive and capacitive load demonstrated improved performance of reduced quenching time. With a commercial APD by HAMAMATSU, the dead time can be adjusted as small as 50 ns.

• ETRI Journal
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• 제31권2호
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• pp.209-214
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• 2009

In this paper, we propose a novel test methodology for the detection of catastrophic and parametric faults present in analog very large scale integration circuits. An automatic test pattern generation algorithm is proposed to generate piece-wise linear (PWL) stimulus using wavelets and a genetic algorithm. The PWL stimulus generated by the test algorithm is used as a test stimulus to the circuit under test. Faults are injected to the circuit under test and the wavelet coefficients obtained from the output response of the circuit. These coefficients are used to train the neural network for fault detection. The proposed method is validated with two IEEE benchmark circuits, namely, an operational amplifier and a state variable filter. This method gives 100% fault coverage for both catastrophic and parametric faults in these circuits.

• Journal of Multimedia Information System
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• 제7권3호
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• pp.205-214
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• 2020

Crime has become one of the major problems in modern society. Even though visual surveillances through closed-circuit television (CCTV) is extensively used for solving crime, the number of crimes has not decreased. This is because there is insufficient workforce for performing 24-hour surveillance. In addition, CCTV surveillance by humans is not efficient for detecting dangerous situations owing to accuracy issues. In this paper, we propose the autonomous detection of dangerous situations in CCTV scenes using a deep learning model with relational inference. The main feature of the proposed method is that it can simultaneously perform object detection and relational inference to determine the danger of the situations captured by CCTV. This enables us to efficiently classify dangerous situations by inferring the relationship between detected objects (i.e., distance and position). Experimental results demonstrate that the proposed method outperforms existing methods in terms of the accuracy of image classification and the false alarm rate even when object detection accuracy is low.

• 전자공학회논문지
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• 제53권11호
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• pp.107-113
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• 2016

전원입력단에 사용되는 회로는 입력전원만을 사용할 수가 있다. 일반적인 전자회로는 입력전원을 이용하는 전압변환기에 의해 생성되는 2차전원을 이용하게 된다. 하지만 전원입력단의 저전압 및 과전압에 의한 고장에 대비하기 위한 보호회로는 2차 전원을 사용할 수가 없기 때문에, 입력전원만을 이용해서 구현이 되어야 한다. MOS FET의 문턱전압 특성을 이용한 저전압/과정압 검출회로는 50V 입력전압만을 이용해서, 정상적인 전압범위를 벗어나는 저전압/과전압 현상을 정상적으로 검출할 수가 있고, 기존의 Zener diode만으로 보호만 가능했던 것을 검출이 가능하게 되었고, 이상전압검출회로의 동작의 정확도를 결정하는 기준전압은 환경조건 등에 의해서 발생할 수 있는 모든 변수를 고려하면 최악조건 해석상으로 8.4%에서 2.5%로 향상되었다.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2015년도 추계학술대회
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• pp.842-846
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• 2015

본 연구에서는 세포의 자가 치료 기능을 모사하여 복잡한 디지털 회로를 기능별 분리시킨 구조에서 회로 동작 중 발생하는 오류 위치를 빠르게 찾고 복구 시키는 알고리즘 방법을 제안한다. 디지털 회로를 각 기능별로 9가지로 분리시켜 오류 난 디지털 회로의 기능블록 위치를 빠르게 검출할 수 있게 하며 복구 시키는 방법을 제안한다. 복잡한 구조의 디지털 회로에서도 각 디지털 회로의 기능 별 위치에 대한 번호 및 좌표를 $3{\times}3$ 행렬 구조로 확대시켜 오류 위치에 대아여 검출 및 복구가 가능한 알고리즘이다.