• 제목/요약/키워드: Design of a Block

검색결과 2,674건 처리시간 0.027초

Nominal axial and flexural strengths of high-strength concrete columns

  • Al-Kamal, Mustafa Kamal
    • Computers and Concrete
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    • 제24권1호
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    • pp.85-94
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    • 2019
  • The ACI building code is allowing for higher strength reinforcement and concrete compressive strengths. The nominal strength of high-strength concrete columns is over predicted by the current ACI 318 rectangular stress block and is increasingly unconservative as higher strength materials are used. Calibration of a rectangular stress block to address this condition leads to increased computational complexity. A triangular stress block, derived from the general shape of the stress-strain curve for high-strength concrete, provides a superior solution. The nominal flexural and axial strengths of 150 high-strength concrete columns tests are calculated using the proposed stress distribution and compared with the predicted strength using various design codes and proposals of other researchers. The proposed triangular stress model provides similar level of accuracy and conservativeness and is easily incorporated into current codes.

Design of a Whitening Block Module for Minimizing DC Bias in Wireless Communications (무선 통신에서 DC 바이어스를 최소화하는 화이트닝 블록 설계)

  • Moon, San-Gook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 한국해양정보통신학회 2008년도 추계종합학술대회 B
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    • pp.673-676
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    • 2008
  • In wireless communications such as Bluetooth, Baseband should be able to minimize the DC bias of the data which passed the modem interface of either transmitter or receiver for the reliability of the circuit and the integrity of the data. The transmitter scrambles the data to send randomly to the error correction block and the receiver recovers the randomly spread data as they have been. To design the whitening block, it is important to select the prime polynomial for the filtering. In this paper, we designed a optimal whitening block using the prime polynomial $g(D)=D^7+D^4+1$ for hardware and area efficiency. The proposed hardware whitening block was described and verified using Verilog HDL and later to be automatically synthesized. The synthesized whitening block operated at 40Mhz normal clock speed of the target baseband microcontroller.

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Modelling Heterogeneity in Fertility for Analysis of Variety Trials (밭의 비옥도를 고려한 품종실험 분석)

  • 윤성철;강위창;이영조;임용빈
    • The Korean Journal of Applied Statistics
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    • 제11권2호
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    • pp.423-433
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    • 1998
  • In agricultural field experiments, the completely randomized block design is often used for the analysis of variety trials. An important assumption is that every experimental unit in each block has the some fertility. But, in most agricultural field experiments there often exists a systematic heterogeneity in fertility among the experimental units. To account for the heterogeneity, we propose to use the hierarchical generalized linear models. We compare our analysis of the data from Scottish Agricultural colleges list with that using Markov chain Monte Carlo method.

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Experimental Investigations of Systematic Errors in Wind Tunnel Testing Using Design of Experiments (실험설계법 기반 풍동시험 시스템 오차 검출 실험연구)

  • Oh, Se-Yoon;Park, Seung-O;Ahn, Seung-Ki
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • 제41권5호
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    • pp.335-341
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    • 2013
  • The variation of systematic bias errors in the wind tunnel testing has been studied. A Design of Experiments(DOE) approach to an experimental study of fuselage drag and stability characteristics of a helicopter configuration was applied. When forces and moments measured in one time block differ significantly from measurements made in another time block under assumption that sample observations can be expected to yield same results within permissible measuring errors. The practical implication of this paper is that the systematic error can not be assumed not to exist. The those error reduction could be achieved through the process of randomization, blocking, and replication of the data points.

Implementation of Low Complexity FFT, ADC and DAC Blocks of an OFDM Transmitter Receiver Using Verilog

  • Joshi, Alok;Gupta, Dewansh Aditya;Jaipuriyar, Pravriti
    • Journal of Information Processing Systems
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    • 제15권3호
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    • pp.670-681
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    • 2019
  • Orthogonal frequency division multiplexing (OFDM) is a system which is used to encode data using multiple carriers instead of the traditional single carrier system. This method improves the spectral efficiency (optimum use of bandwidth). It also lessens the effect of fading and intersymbol interference (ISI). In 1995, digital audio broadcast (DAB) adopted OFDM as the first standard using OFDM. Later in 1997, it was adopted for digital video broadcast (DVB). Currently, it has been adopted for WiMAX and LTE standards. In this project, a Verilog design is employed to implement an OFDM transmitter (DAC block) and receiver (FFT and ADC block). Generally, OFDM uses FFT and IFFT for modulation and demodulation. In this paper, 16-point FFT decimation-in-frequency (DIF) with the radix-2 algorithm and direct summation method have been analyzed. ADC and DAC in OFDM are used for conversion of the signal from analog to digital or vice-versa has also been analyzed. All the designs are simulated using Verilog on ModelSim simulator. The result generated from the FFT block after Verilog simulation has also been verified with MATLAB.

Study on the Plan to Utilize the in-between Space for Forming the identity of Commercial Area - Focused on a block in Sin-Chon - (상업 지역의 장소 정체성 형성을 위한 사이 공간 활용방안에 관한 연구 - 신촌 지역의 한 블록을 중심으로 -)

  • Lee, Yoo-Jung;Kim, Kwang-Soo
    • Proceedings of the Korean Institute of Interior Design Conference
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    • 한국실내디자인학회 2005년도 춘계학술발표대회 논문집
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    • pp.55-59
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    • 2005
  • The purpose of this study is to make an in-between space considered as an abandoned thing to the central place of commercial area by utilizing it to form the each places' identities. The methodology of the design is not about one complete form but about a continuous process by negotiation. This process is proceeded by holding council between public institution and private owners of the buildings and applied the rules to various cases in similar places in the commercial area. This project has been developed in order to construct a healthy network to connect buildings nearby and programs in a block. This place could provide the ground for public communication between any group to visit this place and make the spatial milieu of the city.

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A Numerical Study of Cathode Block and Air Flow Rate Effect on PEMFC Performance (고분자전해질 연료전지의 환원극 블록과 공기 유량 영향에 대한 전산 해석 연구)

  • Jo, Seonghun;Kim, Junbom
    • Applied Chemistry for Engineering
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    • 제33권1호
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    • pp.96-102
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    • 2022
  • Reactants of PEMFC are hydrogen and oxygen in gas phases and fuel cell overpotential could be reduced when reactants are smoothly transported. Numerous studies to modify cathode flow field design have been conducted because oxygen mass transfer in high current density region is dominant voltage loss factor. Among those cathode flow field designs, a block in flow field is used to forced supply reactant gas to porous gas diffusion layer. In this study, the block was installed on a simple fuel cell model. Using computational fluid dynamics (CFD), effects of forced convection due to blocks on a polarization curve and local current density contour were studied when different air flow rates were supplied. The high current density could be achieved even with low air supply rate due to forced convection to a gas diffusion layer and also with multiple blocks in series compared to a single block due to an increase of forced convection effect.

Design and FPGA Implementation of 5㎓ OFDM Modem for Wireless LAN (5㎓대역 OFDM 무선 LAM 모뎀 설계 및 FPGA 구현)

  • Moon Dai-Tchul;Hong Seong-Hyub
    • Journal of the Institute of Convergence Signal Processing
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    • 제5권4호
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    • pp.333-337
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    • 2004
  • This paper describe a design of 5GHz OFDM baseband chip for IEEE 802.11a wireless LAN. The proposed device is consists of transmitter and receiver within a single FPGA chip. We applied single tap equalizer that use Normalized LMS algorithm to remove ISI that happen at high speed data transmission. And also, we used carrier wave frequency offset algorithm that use training symbol to remove ICI. The simulation results show the correct transmission without errors the between transmitter and receiver And we can remarkably reduce the number of register through the synthesized circuits by using DSP block and EMB(Embedded Memory Block). The target device for implementation of the synthesized circuits is Altera Stratix EPIS25FC672 FPGA and design platform is VHDL.

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