• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.8C
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• pp.1210-1217
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• 2004

LILI-II stream cipher is an upgraded version of the LILI-128, one of candidates in NESSIE. Since the algorithm is a clock-controlled, the speed of the keystream data is degraded structurally in a clock-synchronized hardware logic design. Accordingly, this paper proposes a 4-bit parallel LFSR, where each register bit includes four variable data routines for feedback or shifting within the LFSR. furthermore, the timing of the proposed design is simulated using a Max+plus II from the ALTERA Co., the logic circuit is implemented for an FPGA device (EPF10K20RC240-3), and apply to the Lucent ASIC device (LV160C, 0.13${\mu}{\textrm}{m}$ CMOS ＆ 1.5v technology), and it could achieve a throughput of about 500 Mbps with a 0.13${\mu}{\textrm}{m}$ semiconductor for the maximum path delay below 1.8㎱. Finally, we propose the m-parallel implementation of LILI-II, throughput with 4, 8 or 16 Gbps (m=8, 16 or 32).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.2
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• pp.302-312
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• 2012

In this paper, small-area and high-reliability design techniques of a 512-bit EEPROM are designed for UHF RFID tag chips. For a small-area technique, there are a WL driver circuit simplifying its decoding logic and a VREF generator using a resistor divider instead of a BGR. The layout size of the designed 512-bit EEPROM IP with MagnaChip's $0.18{\mu}m$ EEPROM is $59.465{\mu}m{\times}366.76{\mu}m$ which is 16.7% smaller than the conventional counterpart. Also, we solve a problem of breaking 5V devices by keeping VDDP voltage constant since a boosted output from a DC-DC converter is made discharge to the common ground VSS instead of VDDP (=3.15V) in getting out of the write mode.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.9
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• pp.1884-1891
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• 2012

In this paper, we design the sliding correlator SS transceiver which supports short message service. We also analyze the PN code acquisition circuit that is essential for spread spectrum receiver. Using Maxplus II tool provided by altera Co., Ltd, we have designed PN code generator, and sliding correlator for PN code acquisition. Then, they have been made into FPGA by way of EPM7064SLC44-10 - a chip of Altera Co., Ltd. Additionally, we have designed delay clock circuit which is faster than the clock of Tx PN clock, designed switching circuit to control the clock rate and data demodulation circuit. The performance of the transceiver is evaluated from the experimental results. Especially, the performance of PN code acquisition accomplished by sliding correlator which is very important to evaluate spread spectrum receiver is evaluated with the comparison of the lock states.

• International Journal of Internet, Broadcasting and Communication
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• v.14 no.3
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• pp.249-257
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• 2022

In recent years, if we order food by easily accessing the online market with our smartphone, we can receive the product in a fresh state at dawn the next day. Cold chain is an industry that can create high added value because it has both the characteristics of general logistics and sensitivity to temperature. Based on the electrical specifications derived from the reefer container capacity requirement investigation, we proved that power supply to up to 33 reefer containers can be made by using three additional auxiliary power supplies which are applied for freight trains in Korea. In this paper, we conducted a research on a design of power supply system for freight train reefer container based on simulation as a basic research necessary for low-temperature distribution and cold chain construction based on the reefer container railroad. Consequently, the simulation was conducted using the three-phase inverter diagram in PSIM and the SVPWM (3-harmonic injection method) control technique, and it was verified that the required power voltage was satisfied with 622V_dc, which is lower than the input voltage of general SPWM of 718V_dc. The details of this paper could be used as a foundational study for constructing cold chains based on a reefer container dedicated to freight trains in the future.

• Transactions of the Korean Society of Mechanical Engineers
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• v.15 no.1
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• pp.285-291
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• 1991

A two-stage slit type virtual impactor based on the concept of the single stage virtual impactor has been designed, fabricated, and evaluated for the purpose of concentrating the suspended particles in the air with the size range of 1.8-4.5 .mu.m and handling large flow volume. Monodisperse methylene blue particles have been generated with vibrating orifice aerosol generator (VOAG). The separation efficiency and concentration efficiency have been measured by the UV-visible absorption spectrometry. Previous study for a single stage virtual impactor were used to determine the design parameters such as 50% cut-off sizes and dimensions of the two stage virtual impactor. The separation efficiency curve and 50% cut-off Stokes number(cut-off sizes) are not sensitive to the nozzle Reynolds number, but sensitive to the ratio between the minor flow rate and the total flow rate, The measured concentration efficiency was compared with the maximum concentration efficiency determined by the separation efficiencies of the first and the second stages. The differences between the measured and the maximum concentration efficiencies result from the wall loss due to the deposited particles on the internal walls inside the impactor.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.2
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• pp.273-280
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• 1999

This paper presents the design and implementation of circuit analyzer system for the convenient troubleshooting and diagnosis of the electronics appliance using the curve tracer technology of analog signature analysis. The circuit analyzer provides advanced troubleshooting capabilities to simplify testing newer technology components such as CMOS and MOS circuits, its built-in pulse generator lets thoroughly troubleshoot gate-fired devices such as SCRs, TRIACs and optocouplers. The circuit analyzer while the power to the circuitry testing is turned of, so that avoid an accidental short that could cause further damage, its allow to analyze the impedance state of a solid-state component, which makes it perfect for finding leakage or substrate damage that has brought a system or PCB down prematurely. Because it can compare suspect components to known-good equivalents, it's verified the ideal application for troubleshooting when documentation is missing or incomplete.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.4
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• pp.695-701
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• 2009

Vortex tube is the device that can separate small particles from the compressed gas, as well as compressed gas into hot and cold flow. In this study, computational approach has been performed to analyze the characteristics of the vortex tube. Energy separation characteristics of the vortex tube has been tested for various geometric design parameters. For the given conditions, it is found that as the tube is lengthened, hot end temperature is reduced but cold end temperature does not influenced much. As the orifice diameter decreases, cold end temperature decreases. Also, as hot gas fraction increases, hot end temperature decreases. The results from this study can be used for the basic design parameter of the $CO_2$ reduction device.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.11
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• pp.1304-1310
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• 2010

This study is to design FMCW radar transceiver of K-band which is used to detect and track approaching high speed targets with low altitude. The transmitter needs high output power due to small RCS targets and wide beamwidth of transmit antenna. Multi-channel receivers are required to detect and track targets by interferometer method. Transmitter consists of high power amplifier, waveguide switch, and frequency up-converter. Receiver is composed of five channel receivers, up and down converters, X-band local oscillator and waveform generator. Before manufacturing it, the proposed architecture of transceiver is proved by modeling and simulation using several parameters. Then, it is manufactured by using industrial RF components. The performance parameters are measured through experiment. In the experiment, transmitting power and receiver gain were measured with 39.64 dBm and 29.1 dB, respectively. All other parameters in the specification were satisfied as well.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.12
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• pp.47-56
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• 2008

An RFID system comprises a reader and a tag, and this paper focuses on a tag design. A UHF tag is activated by energy supply using electromagnetic waves and energy reflection through impedance mismatching. The tag uses a $0.25{\mu}m$ CMOS process and comprises a digital part executing tag protocols, a 512-bit memory, and an analog part having a rectifier, a modulation/demodulation unit, a clock generator, etc. The total dimension of the tag, including a saw line, is $750{\mu}m*750{\mu}m$ and the power consumption of the tag consumption power is about $17.8{\mu}W$ at a supply voltage of 2V.

• Journal of Digital Contents Society
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• v.9 no.3
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• pp.491-498
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• 2008

The leakage of sensitive information by an insider within the organization becomes a serious threat nowadays. Sometimes, these insider threats are more harmful to an organization than external attack. Companies cannot afford to continue ignoring the potential of insider attacks. The purpose of this study is to design an integrated log analysis system that can detect various types of information leakages. The system uses threat rules generated through risk analysis, and monitors every aspect of the online activities of authorized insider. Not only should system have the ability to identify abnormal behavior, they should also be able to predict and even help to prevent potential risk. The system is composed of three modules, which are log collector, log analyzer and report generator.