• 제목/요약/키워드: Design Verification

검색결과 2,938건 처리시간 0.033초

냉간단조 공정설계 시스템과 유한요소해석에 의한 검증 (Computer-Aided Process Planning System of Cold Forging and its Verification by F.E. Simulation)

  • Lee, E.H.;Kim, D.J.;Park, J.C.
    • 한국정밀공학회지
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    • 제13권4호
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    • pp.43-52
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    • 1996
  • This paper describes interactive computer procedures for design the forming sequences in cold forging. This system is implemented on the personal computer and its environment is a commercial AutoCAD system. The programming language. AutoLISP, was used for the configuration of the system. Since the process of metal forming can be considered as a transformation of geometry, treatment of the geometry of the part is a key in process planning. To recognize the part section geometry, the section entity representation, the section coordinate-redius representation and the section primitive geometru were adopted. This system includes six major modules such as input module, forging design module, forming sequence design module, die design module, FEM verification module and output module which are used independently or in all. The sequence drawing wigh all dimensions, which includes the dimensional tolerances and the proper sequence of operations, can generate under the environment of AutoCAD. The acceptable forming sequences can be verified further, using the FE simulation.

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알루미늄 압출재 철도차량 차체 구조물의 자동화 구조 설계 및 해석 지원 프로그램 개발 (Development of Automated Structural Design and Analysis Aided-Program of Aluminum Extrusion Carbody Structures for Railway Vehicle)

  • 김준환;신광복;강승구;이용주
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2011년도 정기총회 및 추계학술대회 논문집
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    • pp.2679-2683
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    • 2011
  • The purpose of this study is to develop automated structural design and analysis aided-program of aluminum extrusion carbody structures for railway vehicle. This developed program is possible to perform simultaneously structural design and design verification of aluminum extrusion profiles independent of expertise and experience of design engineers. Design engineers was able to design it using database of existing aluminum extrusion profiles or user-defined function. The design verification was programmed to evaluate its structural integrity according to Korean Railway Safety Law or Urban Transit Safety Law. Also, this program could automatically generate an executable file of various commercial finite element program and CAD files such as stp and iges by GUI environment applications using MFC(Microsoft Foundation Classes). In conclusion, it is expected to contribute to reduce product development time and improve product quality of aluminum extrusion profile and structures in railway industry.

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Master-Slave 기법을 적용한 System Operation의 동작 검증 (Verification of System using Master-Slave Structure)

  • 김인수;민형복
    • 전기학회논문지
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    • 제58권1호
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    • pp.199-202
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    • 2009
  • Scan design is currently the most widely used structured Design For Testability approach. In scan design, all storage elements are replaced with scan cells, which are then configured as one or more shift registers(also called scan chains) during the shift operation. As a result, all inputs to the combinational logic, including those driven by scan cells, can be controlled and all outputs from the combinational logic, including those driving scan cells, can be observed. The scan inserted design, called scan design, is operated in three modes: normal mode, shift mode, and capture mode. Circuit operations with associated clock cycles conducted in these three modes are referred to as normal operation, shift operation, and capture operation, respectively. In spite of these, scan design methodology has defects. They are power dissipation problem and test time during test application. We propose a new methodology about scan shift clock operation and present low power scan design and short test time.

도시형 자기부상열차 실용화사업의 상세설계검토(CDR) 수행 사례 (A study on the Critical Design Review in case of Urban MAGLEV Train)

  • 정경렬;박철호;송선호
    • 시스템엔지니어링학술지
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    • 제4권1호
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    • pp.45-51
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    • 2008
  • This paper presents template for Critical Design Review(CDR) in case of Urban MAGLEV Program. CDR was executed to confirm for design result based on requirements at last design stage. The integrated template for effective CDR includes requirements, specification and verification items. CDR needs to confirm satisfaction of requirements for design result and define verification method for technical validity. This template will help a consistent and integrated design review. And it is specially useful in huge and complex project.

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TSI 인증기준에 따른 유럽 표준형 자동복합연결기 헤드의 설계적합성 검증 연구 (A Study on the Verification of Design Compatibility for a Europe Type Automatic Coupler Head according to TSI Certification Standards)

  • 민경빈;박진규;강지성;김기남
    • 한국철도학회논문집
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    • 제19권1호
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    • pp.29-37
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    • 2016
  • 국내 철도안전법의 형식승인 제도는 2014년도에 시행되어 현재 차량분야부터 순차적으로 기술기준이 고시되고 있다. 형식승인 제도의 인증 대상품은 철도차량과 철도용품으로 구분되며, 형식승인 제도에서는 기존 인증제도와는 다르게 설계적합성 검증, 설계합치성 검증, 형식시험 검사의 순서로 설계에 대한 입증이 요구되고 있으며, 이는 TSI 인증 등 전세계의 인증 제도와 부합화된 내용이다. 본 연구에서는 유럽 표준형 자동복합연결기 시스템을 구성하는 하부시스템 중 연결기 헤드에 대하여 국내 철도안전법 형식승인 제도와 TSI 기준의 요구사항을 도출하고 그 중에서 설계적합성 검증 항목을 분류하였다. 분류된 34개의 설계적합성 검증항목 중 32개는 도면 및 기술검토서를 통해 검증하였으며, 분석이 필요한 2개의 항목에 대하여 연결범위 분석 및 강도해석을 수행함으로써 유럽 표준형 자동복합연결기 헤드가 국내외 기술기준 및 규격의 요구사항에 적합하게 설계되었음을 확인하였다.

초기설계단계에서 건축물 통합 안전성능 검증을 위한 평가요소 체계화에 관한 연구 (Systematization of Evaluation Indicators for Integrated Safety Performance Verification of Buildings in the Early Design Stage)

  • 서지효;추승연
    • 대한건축학회논문집:계획계
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    • 제34권3호
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    • pp.53-60
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    • 2018
  • When planning buildings, safety should be considered as a priority over any other performance. The study aims to derive and systematize elements that can be reflected in the design stage, which affects the safety of construction workers and building users. The elements for safety of workers are classified by type of work, and the elements for safety of users are classified by fields. Elements that are difficult to be reflected in design stage or those whose effects are insignificant are excluded. In addition, application scenarios have been proposed for each element so that the elements created in this study can be directly applied and utilized in practice. This will contribute to lowering the accident rate of construction projects by evaluating the harmful risks of construction projects at the design stage.

16 비트 RISC 프로세서 설계 및 검증 (Design & Verification of 16 Bit RISC Processor)

  • 정승표;송승원;이동훈;김강주;조군식;박주성
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2008년도 하계종합학술대회
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    • pp.423-424
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    • 2008
  • The procedure of design and verification for a 16-bit RISC processor is introduced in this paper. The proposed processor has Harvard architecture and consists of 24-bit address, 5-stage pipeline instruction execution, and internal debug logic. ADPCM vocoder and SOLA algorithm are successfully carried out on the processor made with FPGA.

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자기베어링과 공위한 축전센서의 설계 및 성능 평가 (The Design and Performance Verification of Collocated Capacitance Sensor for Magnetic Bearing)

  • 유선중;신동원;김종원
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1994년도 추계학술대회 논문집
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    • pp.317-322
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    • 1994
  • The design and performance verification of collocated capacitance sensor system for magnetic bearing is presented. Noncollocation between actuators and sensors may cause unstable rotor behavior. The capacitance sensor is not affected by magnetic field. PCB type capacitance sensor is installed between magnetic bearing polse. so, collocation of sensors and actuators can be achieved. Experiment of sensor's static and dynamic charactistics is conducted. Modeling of the rotor system supported by magnetic bearing is made. And performance comparison between simulation and experiment is showed.

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행위 수준의 VHDL 설계 검증 방법 (Method for Verification of VHDL Behavioral-level Design)

  • 박승규;김종현;서영호;김동욱
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.377-380
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    • 1999
  • This paper proposed a method to detect and locate coding errors in HDL behavioral descriptions (designs). The target coding errors are the ones that the compiler cannot find out. As the method, this paper used verification pattern generation method. Thus, an algorithm to generate the verification patterns was proposed, in which the pattern generation is performed by a path- searching method. Various example designs were applied to this algorithm to verify the correctness and effectiveness of the proposed method.

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실제 트래픽 기반의 기가비트 스위치 칩의 검증 (Real-Traffic Based Verification for Gigabit-Switch Chips)

  • 전정범;장유성;이주환;강무경;이승왕;경종민
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.1049-1052
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    • 1999
  • As the Internet traffic increases, the demand for higher performance routers continues to grow, and it makes switch chips more complex. To make matters worse, these chips also need to handle high-level services. In this paper, we introduce an efficient verification methodology that can support real network traffics to satisfy the verification requirement of real complex situation even at the early design phase of switch chips.

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