• 제목/요약/키워드: Design Domain Reduction

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Elastic floor response spectra of nonlinear frame structures subjected to forward-directivity pulses of near-fault records

  • Kanee, Ali Reza Taghavee;Kani, Iradj Mahmood Zadeh;Noorzad, Assadollah
    • Earthquakes and Structures
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    • 제5권1호
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    • pp.49-65
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    • 2013
  • This article presents the statistical characteristics of elastic floor acceleration spectra that represent the peak response demand of non-structural components attached to a nonlinear supporting frame. For this purpose, a set of stiff and flexible general moment resisting frames with periods of 0.3-3.6 sec. are analyzed using forty-nine near-field strong ground motion records. Peak accelerations are derived for each single degree of freedom non-structural component, supported by the above mentioned frames, through a direct-integration time-history analysis. These accelerations are obtained by Floor Acceleration Response Spectrum (FARS) method. They are statistically analyzed in the next step to achieve a better understanding of their height-wise distributions. The factors that affect FARS values are found in the relevant state of the art. Here, they are summarized to evaluate the amplification and/or reduction of FARS values especially when the supporting structures undergo inelastic behavior. The properties of FARS values are studied in three regions: long-period, fundamental-period and short-period. Maximum elastic acceleration response of non-structural component, mounted on inelastic frames, depends on the following factors: inelasticity intensity and modal periods of supporting structure; natural period, damping ratio and location of non-structural component. The FARS values, corresponded to the modal periods of supporting structure, are strongly reduced beyond elastic domain. However, they could be amplified in the transferring period domain between the mentioned modal periods. In the next step, the amplification and/or reduction of FARS values, caused by inelastic behavior of supporting structure, are calculated. A parameter called the response acceleration reduction factor ($R_{acc}$), has been previously used for far-field earthquakes. The feasibility of extending this parameter for near-field motions is focused here, suggested repeatedly in the relevant sources. The nonlinearity of supporting structure is included in ($R_{acc}$) for better estimation of maximum non-structural component absolute acceleration demand, which is ordinarily neglected in the seismic design provisions.

10비트 CMOS algorithmic A/D 변환기를 위한 저전력 MDAC 회로설계 (A low-power multiplying D/A converter design for 10-bit CMOS algorithmic A/D converters)

  • 이제엽;이승훈
    • 전자공학회논문지C
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    • 제34C권12호
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    • pp.20-27
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    • 1997
  • In this paper, a multiplying digital-to-analog converter (MDAC) circuit for low-power high-resolution CMOS algorithmic A/D converters (ADC's) is proposed. The proposed MDAC is designed to operte properly at a supply at a supply voltge between 3 V and 5 V and employs an analog0domain power reduction technique based on a bias switching circuit so that the total power consumption can be optimized. As metal-to-metal capacitors are implemented as frequency compensation capacitors, opamps' performance can be varied by imperfect process control. The MDAC minimizes the effects by the circuit performance variations with on-chip tuning circuits. The proposed low-power MDAC is implementd as a sub-block of a 10-bit 200kHz algorithmic ADC using a 0.6 um single-poly double-metal n-well CMOS technology. With the power-reduction technique enabled, the power consumption of the experimental ADC is reduced from 11mW to 7mW at a 3.3V supply voltage and the power reduction ratio of 36% is achieved.

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다해상도를 위한 영상의 숙소 및 확대 algorithm (Image site reduction and expansion for multiresolution)

  • 염선숙;김준우;김민기
    • 대한의용생체공학회:학술대회논문집
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    • 대한의용생체공학회 1993년도 추계학술대회
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    • pp.194-197
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    • 1993
  • A technique for fast image reduction or expansion, in which the reduction(expansion) factor is either any integer or any rational number M/L Is represented. The multiresolution is modeled as an interpolation and filtering followed by a decimation. The model enables frequency domain analysts of the muitiresolution representations as well as convenient design of the Kernels(filters). Using any rin linear phase(Type I) filters a fine to coarse multiresolution structure can be generated.

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Optimal design for face milling cutter by simulation

  • Kim, J.H.;Lee, B.C.;Kim, H.S.
    • 한국정밀공학회지
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    • 제10권2호
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    • pp.76-85
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    • 1993
  • Based on the cutting force model, three-dimensional optimal design model was developed and optimal designed tool which is minimized cutting force is developed by computer simulation technique. In this model the objective function which is minimized resultant cutting force was used and the variables are radial rake angle, axial rake angle, lead angle of the tool. The cutting forces using conventional and optimal tools by simulation, are compared and analyzed in time and frequency domains. In time domain the cutting force of optimal tool in feed direction was more reduced and less fluctuated than that of conventional tool. Cutting forces of optimal tool in X-and Z-directions are shown a little increased than those of conventional tool. In frequency domain amplitude of insert frequency components of optimal tool in feed direction was more reduced than that of convent- ional tool. The amplitudes of insert frequency components of optimal tool in X-and Z-direction are a little increased than those of conventional tool. As the reduction of amplitude and fluctuations of the cutting force, Optimal tool is considered that tool life and surface roughness would be improved, and stable cutting would be expected.

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주행시 비틀림진동 저감을 위한 클러치 비틀림특성 연구 (A Study on Clutch Torsional Characteristics for the Torsional Vibration Reduction at Driving)

  • 정태진;홍동표;태신호;윤영진;김상수
    • 소음진동
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    • 제5권1호
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    • pp.75-83
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    • 1995
  • The fluctuation of the engine torque appears to be the major source of the torsional vibration of the automotive driveline. The reduction of this torsional vibration has become a significant problem, due to an increase in the fluctuation of the torque of recent light weighted and high powered engines, along with the requirements of higher performance. The torsional vibration of the automotive driveline can be reduced by smoothing the fluctuation by adjusting the torsional characteristics of the clutch-disc. This paper presents an experimental and theoretical research on the clutch-disc torsional characteristics for the reduction of the torsional vibration at driving. The effects of clutch-damper on diminishing the torsional vibration were investigated experimentally. A dynamic model for the automotive driveline was developed, and the engine torque of the model were evaluated with experimental data. By executing a simulation using the model, it has become possible to obtain the clutch-disc torsional characteristics and the clutch-disc torsional characteristics for reducing the torsional vibration has been suggested. The results are as follows: (1) By exceuting simulations using nonlinear model of four degrees of freedom, a design technique to determine the clutch-disc torsional characteristics for reducing the torsional vibration at driving was developed. (2) The influence of barious torsional characteristics of the clutch has been studied in examining design parameters, which indicates that the domain to minimize the torsional vibration at driving depends on the characteristics of the clutch-damper, i. e., spring constant and hysteresis.

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투과 소음 저감을 위한 다공성 패널 설계 (Design of a Perforated Panel for Transmission Noise Reduction)

  • 박영효;배재혁;이진우
    • 대한기계학회논문집A
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    • 제39권4호
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    • pp.437-445
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    • 2015
  • 유체는 잘 통과시키면서 소음을 줄일 수 있는 다공성 패널을 설계하는 방법을 제시한다. 주된 아이디어는 1/4 파장관을 다공성 패널의 구멍들 주위에 배열하는 것이다. 먼저, 구멍이 하나만 있는 단위모델에 대한 다양한 사례 연구를 수행한다. 패널의 두께를 증가시키지 않기 위해, 단위 모델을 수직 방향으로 세 개층으로 분할하고, 가운데 분할층을 설계 영역으로 선정한다. 투과 손실 곡선 상에서 목표투과 손실 값을 상회하는 주파수 대역이 가능한 넓도록 1/4 파장관의 개수와 배열을 결정한다. 이렇게 최적 설계된 단위 모델을 다공성 패널에 주기적으로 배열하여 설계 목적을 달성하였다. 제시된 방법은 특정 목표 주파수와 목표 투과 손실 값에 대해 전개되었지만, 다양한 목표값에 적용 가능하다.

주파수 영역에서 Walsh 함수에 의한 전달함수의 간단화 (Simplification of Transfer Function Via Walsh Function in Frequency Domain)

  • Doo-Soo Ahn
    • 대한전기학회논문지
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    • 제31권8호
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    • pp.33-38
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    • 1982
  • This paper deals with the simplification of the transfer function in a frequency domain, viz. the integral of the squared errors between the original and the simplified model is minimized and the latter is estimated by the Walsh function. It tries to minimize the errors between the frequency responses of the two functions. This method is compared with the existing method by means of a numercal example. The frequency response of this simplified model approximates closely to that of the original model. The proposed method is simpler in analysis and easier in implementation than the existing methods. Though the Walsh function can be easily generated with the discrete values, it has errors because its zero crossings are not continuous. This method aims at the reduction of the errors in the real parts and the imaginary parts of the two functions by dividing into the more sub-intervals, and selecting the reduced-order model according to the response of the model. As a result, it can be applied for the simplification of higher order functions into lower order functions and for the design of control systems.

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정지비행 헬리콥터 로터의 설계를 위한 공력해석 (DESIGN-ORIENTED AERODYNAMIC ANALYSES OF HELICOPTER ROTOR IN HOVER)

  • 정현주;김태승;손창호;조창열
    • 한국전산유체공학회지
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    • 제11권3호
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    • pp.1-7
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    • 2006
  • Euler and Navier-Stokes flow analyses for helicopter rotor in hover were performed as low and high fidelity analysis models respectively for the future multidisciplinary design optimization(MDO). These design-oriented analyses possess several attributes such as variable complexity, sensitivity-computation capability and modularity which analysis models involved in MDO are recommended to provide with. To realize PC-based analyses for both fidelity models, reduction of flow domain was made by appling farfield boundary condition based on 3-dimensional point sink with simple momentum theory and also periodic boundary condition in the azimuthal direction. Correlations of thrust, torque and their sensitivities between low and high complexity models were tried to evaluate the applicability of these analysis models in MDO process. It was found that the low-fidelity Euler analysis model predicted inaccurate sensitivity derivatives at relatively high angle of attack.

컴플라이언스 패턴 기반 유전자 알고리즘을 이용한 구조물 위상설계 (Structural Topology Design Using Compliance Pattern Based Genetic Algorithm)

  • 박영오;민승재
    • 대한기계학회논문집A
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    • 제33권8호
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    • pp.786-792
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    • 2009
  • Topology optimization is to find the optimal material distribution of the specified design domain minimizing the objective function while satisfying the design constraints. Since the genetic algorithm (GA) has its advantage of locating global optimum with high probability, it has been applied to the topology optimization. To guarantee the structural connectivity, the concept of compliance pattern is proposed and to improve the convergence rate, small number of population size and variable probability in genetic operators are incorporated into GA. The rank sum weight method is applied to formulate the fitness function consisting of compliance, volume, connectivity and checkerboard pattern. To substantiate the proposed method design examples in the previous works are compared with respect to the number of function evaluation and objective function value. The comparative study shows that the compliance pattern based GA results in the reduction of computational cost to obtain the reasonable structural topology.

A 4x Time-Domain Interpolation 6-bit 3.4 GS/s 12.6 mW Flash ADC in 65 nm CMOS

  • Liu, Jianwei;Chan, Chi-Hang;Sin, Sai-Weng;U, Seng-Pan;Martins, Rui Paulo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권4호
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    • pp.395-404
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    • 2016
  • A 6-bit 3.4 GS/s flash ADC in a 65 nm CMOS process is reported along with the proposed 4x time-domain interpolation technique which allows the reduction of the number of comparators from the conventional $2^N-1$ to $2^{N-2}$ in a N-bit flash ADC. The proposed scheme effectively achieves a 4x interpolation factor with simple SR-latches without extra clocking and calibration hardware overhead in the interpolated stage where only offset between the $2^{N-2}$ comparators needs to be calibrated. The offset in SR-latches is within ${\pm}0.5$ LSB in the reported ADC under a wide range of process, voltage supply, and temperature (PVT). The design considerations of the proposed technique are detailed in this paper. The prototype achieves 3.4 GS/s with 5.4-bit ENOB at Nyquist and consumes 12.6 mW power at 1 V supply, yielding a Walden FoM of 89 fJ/conversion-step.