• Title/Summary/Keyword: Description logic

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Traffic Rout Choice by means of Fuzzy Identification (퍼지 동정에 의한 교통경로선택)

  • 오성권;남궁문;안태천
    • Journal of the Korean Institute of Intelligent Systems
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    • v.6 no.2
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    • pp.81-89
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    • 1996
  • A design method of fuzzy modeling is presented for the model identification of route choice of traffic problems.The proposed fuzzy modeling implements system structure and parameter identification in the eficient form of""IF..., THEN-.."", using the theories of optimization theory, linguistic fuzzy implication rules. Three kinds ofmethod for fuzzy modeling presented in this paper include simplified inference (type I), linear inference (type 21,and proposed modified-linear inference (type 3). The fuzzy inference method are utilized to develop the routechoice model in terms of accurate estimation and precise description of human travel behavior. In order to identifypremise structure and parameter of fuzzy implication rules, improved complex method is used and the least squaremethod is utilized for the identification of optimum consequence parameters. Data for route choice of trafficproblems are used to evaluate the performance of the proposed fuzzy modeling. The results show that the proposedmethod can produce the fuzzy model with higher accuracy than previous other studies -BL(binary logic) model,B(production system) model, FL(fuzzy logic) model, NN(neura1 network) model, and FNNs (fuzzy-neuralnetworks) model -.fuzzy-neural networks) model -.

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Implementation of the Digital Current Control System for an Induction Motor Using FPGA (FPGA를 이용한 유도 전동기의 디지털 전류 제어 시스템 구현)

  • Yang, Oh
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.11
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    • pp.21-30
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    • 1998
  • In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.

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Learning Opposite Concept for Incomplete Domain Theory (불완전한 영역이론을 위한 반대개념의 학습)

  • Tae, Gang-Su
    • Journal of KIISE:Software and Applications
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    • v.26 no.8
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    • pp.1010-1017
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    • 1999
  • 불완전한 계획 영역 이론은 오류 영역(noisy domain)에서 하나의 상태에 상반된 연산자들이 적용되는 불일치성 문제를 야기할 수 있다. 이 문제를 해결하기 위해서 본 논문은 상태를 기술하기 위해 다치 논리를 도입하여 제어지식으로서의 부정적 선행조건을 학습하는 새로운 방법을 제안한다. 기계에는 알려지지 않은 이러한 제어지식이 인간에게는 반대개념으로 잠재적으로 사용되고 있다. 이러한 잠재된 개념을 학습하기 위해 본 논문은 반대 연산자들로 구성된 사이클을 영역이론으로부터 기계적으로 생성하고, 이 연산자들에 대한 실험을 통해 반대 리터럴(literal)들을 추출한다. 학습된 규칙은 불일치성을 방지하면서 동시에 중복된 선행조건을 제거하여 연산자를 단순화시킬 수 있다.Abstract An incomplete planning domain theory can cause an inconsistency problem in a noisy domain, allowing two opposite operators to be applied to a state. To solve the problem, we present a novel method to learn a negative precondition as control knowledge by introducing a three-valued logic for state description. However, even though the control knowledge is unknown to a machine, it is implicitly known as opposite concept to a human. To learn the implicit concept, we mechanically generate a cycle composed of opposite operators from a domain theory and extract opposite literals through experimenting the operators. A learned rule can simplify the operator by removing a redundant precondition while preventing inconsistency.

An Efficient Dead Pixel Detection Algorithm and VLSI Implementation (효율적인 불량화소 검출 알고리듬 및 하드웨어 구현)

  • An Jee-Hoon;Lee Won-Jae;Kim Jae-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.9 s.351
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    • pp.38-43
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    • 2006
  • In this paper, we propose the efficient dead pixel detection algorithm for CMOS image sensors and its hardware architecture. The CMOS image sensors as image input devices are becoming popular due to the demand for miniaturized, low-power and cost-effective imaging systems. However, the presence of the dead pixels degrade the image quality. To detect the dead pixels, the proposed algorithm is composed of scan, trace and detection step. The experimental results showed that it could detect 99.99% of dead pixels. It was designed in a hardware description language and total logic gate count is 3.2k using 0.25 CMOS standard cell library.

Integration of OWL and SWRL Inference using Jess (Jess를 이용한 OWL과 SWRL 통합추론에 관한 연구)

  • Lee Ki-Chul;Lee Jee-Hyong
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2005.11a
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    • pp.213-216
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    • 2005
  • W3C에서는 온톨로지의 표준 언어로 OWL(Web Ontology Language)을 발표하였고 이를 활용한 온톨로지가 다양한 곳에 적용되어 구축이 되고 있다. 하지만, DL(Description Logic)기반인 OWL언어가 표현할 수 있는 규칙의 한계로 인하여 이를 확장하기 위한 연구가 활발히 진행되고 있다. 이러한 연구를 통하여 W3C에서는 OWL과 RuleML(Rule Markup Language)을 통합하여 규칙(Rule)에 대한 표현력이 더욱 향상된 SWRL(Semantic Web Rule Language) 언어를 제안하였다. 현재 이러한 연구는 OWL, SWRL 온톨로지 언어를 활용하고 Racer, Jess와 같은 엔진을 통하여 추론을 하는 형태로 활성화 되어 가고 있다. 하지만 이러한 형태로 온톨로지를 구축하는데 있어서 Racer를 이용한 DL추론, Jess를 이용한 Rule-base추론이 병행되고 있다. 이에 따라 본 논문에서는 온톨로지를 추론하기 위한 엔진으로 Racer와 Jess의 병행이 아닌, Jess를 이용하여 DL기반언어인 OR온톨로지를 추론하는 것 뿐 만 아니라 SWRL언어의 규칙 또한 추론할 수 있도록 한다. 이러한 시스템을 구축하기 위해 OWL을 Jess언어를 이용하여 추론할 수 있도록 개발된 OWLJessKB라는 툴과 SWRL언어를 추론하기 위해 Jess언어로 변환하여 이를 추론하는 SWRL Factory, 그리고 이출 이용하여 통합 추론하기 위한 세가지 통합 추론 플랫폼을 제안한다.

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Methods to Reduce Execution Time of Ontology Reasoners based on Tableaux Algorithm (태블로 알고리즘 기반 온톨로지 추론 엔진의 속도 향상을 위한 방법)

  • Kim, Je-Min;Park, Young-Tack
    • Journal of KIISE:Software and Applications
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    • v.36 no.2
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    • pp.153-160
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    • 2009
  • As size of ontology has been increased more and more, the descriptions in the ontologies become more complicated, Therefore finding and modifying unsatisfiable concepts is hard work in ontology construction process, Minerva is an ontology reasoner which detects unsatisfiable concepts automatically and infers subsumption relation between concepts in ontology, Most description logic based ontology reasoners (including Minerva) work using tableaux algorithm, Because tableaux algorithm is very costly, ontology reasoners need various optimization methods, In this paper, we propose optimizing methods to reduce execution time of tableaux algorithm based ontology reasoner. Proposed methods were applied to Minerva which was developed as preceding study result. In consequence the new version Minerva shows high performance.

Description Logic base Ontology Modeling for Building Intelligent Agent (지능적 에이전트 구성을 위한 서술논리 기반 온톨로지 모델링)

  • Yang, Seoung-Kuk;Seo, Eun-Seok;Park, Young-Tack
    • Proceedings of the Korean Information Science Society Conference
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    • 2011.06a
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    • pp.282-285
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    • 2011
  • 서술논리를 기반으로 하는 OWL 온톨로지는 표준화된 형식적 언어로써 실세계의 도메인 지식을 표현하는데 적합하다. 따라서 논리를 바탕으로 명시적으로 정의된 지식 속에 내재되어 있는 새로운 지식의 추론이 가능하다. 그러나 OWL이 가지는 Open World Assumption(OWA)의 특성은 근거가 불완전하거나 완전한 정보획득이 불가능한 상황에서의 추론을 제한한다. 더불어 OWL이 가지는 또 다른 특성으로 Unique Name Assumption(UNA)의 비지원은 실제적 지식표현을 지원하는 반면, 표현의 불충분으로 인해 결과 도출의 불능을 야기한다. 이러한 특징을 고려하여, 본 논문에서는 지능형 에이전트 구성을 위한 서술논리 기반 지식 표현 방법을 제안한다. 이는 논리적 정당성을 유지하고 올바른 결과를 이끌어 낼 수 있도록 하며, 항상 논리적 결론 도출이 가능한 지식모델을 구성할 수 있도록 돕는다. 이를 통해, 지식모델에 정의된 불완전한 개념에 있어서 OWL이 가지는 특징으로 인하여 발생할 수 있는 문제점에 대한 해결방안을 제시한다. 이에 있어서, 모바일 온톨로지의 예를 통하여 OWA와 UNA에 따른 추론의 제약을 보이며, 이를 해결할 수 있는 방안을 논리적으로 표현함으로써 본 제안의 정당성을 증명한다.

Design and implementation of the SliM image processor chip (SliM 이미지 프로세서 칩 설계 및 구현)

  • 옹수환;선우명훈
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.10
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    • pp.186-194
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    • 1996
  • The SliM (sliding memory plane) array processor has been proposed to alleviate disadvantages of existing mesh-connected SIMD(single instruction stream- multiple data streams) array processors, such as the inter-PE(processing element) communication overhead, the data I/O overhead and complicated interconnections. This paper presents the deisgn and implementation of SliM image processor ASIC (application specific integrated circuit) chip consisting of mesh connected 5 X 5 PE. The PE architecture implemented here is quite different from the originally proposed PE. We have performed the front-end design, such as VHDL (VHSIC hardware description language)modeling, logic synthesis and simulation, and have doen the back-end design procedure. The SliM ASIC chip used the VTI 0.8$\mu$m standard cell library (v8r4.4) has 55,255 gates and twenty-five 128 X 9 bit SRAM modules. The chip has the 326.71 X 313.24mil$^{2}$ die size and is packed using the 144 pin MQFP. The chip operates perfectly at 25 MHz and gives 625 MIPS. For performance evaluation, we developed parallel algorithms and the performance results showed improvement compared with existing image processors.

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FSM State Assignment for Low Power Dissipation Based on Markov Chain Model (Markov 확률모델을 이용한 저전력 상태할당 알고리즘)

  • Kim, Jong-Su
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.2
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    • pp.137-144
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    • 2001
  • In this paper, a state assignment algorithm was proposed to reduce power consumption in control-flow oriented finite state machines. The Markov chain model is used to reduce the switching activities, which closely relate with dynamic power dissipation in VLSI circuits. Based on the Markov probabilistic description model of finite state machines, the hamming distance between the codes of neighbor states was minimized. To express the switching activities, the cost function, which also accounts for the structure of a machine, is used. The proposed state assignment algorithm is tested with Logic Synthesis Benchmarks, and reduced the cost up to 57.42% compared to the Lakshmikant's algorithm.

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A Study on the Application of Genetic Algorithms and Fuzzy System to GAS Identification System (가스 식별 시스템 설계를 위한 유전알고리즘과 퍼지시스템 적용에 관한 연구)

  • Bang, Young-Keun;Haibo, Zhao;Lee, Chul-Heui
    • Journal of Industrial Technology
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    • v.31 no.B
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    • pp.45-50
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    • 2011
  • Recently, machine olfactory systems that have been proposed as an artificial substitute of the human olfactory system are being studied by many researchers because they can scent dangerous gases and identify the type of gases in contamination areas instead of the human. In this paper, we present an effective design method for the gas identification system. The design method adopted the sequential combination between genetic algorithms and TSK fuzzy logic system. First, the proposed method allowed the designed gas identification system effectively performing the pattern analysis because it was able to avoid the curse of dimensionality caused by use of a large number of sensors. Secondly, the method led the gas identification system to good performance because it was able to deal with drift characteristics of the sensor data by using description ability of the fuzzy system for nonlinear data. In simulation, we demonstrated the effectiveness of the designed gas identification system by using the simulation results of five types of gases.

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