• Title/Summary/Keyword: Delay propagation

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Nonlinear Earthquake Response Analysis of a Multi-Su, pp.rted Self-anchored Suspension Bridge (다중지지된 자정식 현수교의 비선형 지진응답 해석)

  • 김호경;서정인
    • Journal of the Earthquake Engineering Society of Korea
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    • v.1 no.3
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    • pp.45-58
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    • 1997
  • An analysis algorithm and a computer program have been developed to clarify the geometrically nonlinear response characteristics of a suspension bridge subject to the support excitation. The Finite Element procedures are utilized for the application to a self-anchored suspension bridge or to a mono-duo cable suspension bridge. The propagation of earthquake wave is simulated by taking a record as the input at the left anchorage of the bridge, and addign appropriate time delay to the other inputs for the purpose of considering the multi-support effects. According to the application for a mono-duo self-anchored suspension bridge, it has been found that the effects of nonlinear behavior and multi-support excitation are notable for this relatively short-spanned suspension bridge.

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The Method of Addition Subexpression for High-Speed Multiplierless FIR Filters (곱셈기를 사용하지 않은 고속 FIR 필터를 위한 부분 항 덧셈 방법)

  • Kim, Yong-Eun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.8
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    • pp.32-36
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    • 2008
  • Multiplierless FIR filters can be designed by only adders using Common Subexpression algorithm. It has small area compared with filter which using multipliers. But it has long operation time because of carry ripple from the adder. In this paper, when the subexpressions are added in multiplier less filters, the number of subexpressions maintains 2 until final addition to avoid carry ripple of the addition, so the subexpression addition time of the filter can be reduced. To verify proposed method, subexpression adder circuit of the FIR filter is designed using given example of paper. The designed filter was synthesized using Hynix 0.18um process. By Synopsys simulation results, it is shown that by the proposed method, area, propagation delay time can be reduced up to 53.2%, 57.9% compared with conventional design method which using pipeline.

Development of Electrical Models of TFT-LCD Panels for Circuit Simulation

  • Park, Hyun-Woo;Kim, Soo-Hwan;Kim, Sung-Ha;Kim, Su-Ki;McCartney, Richard I.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.733-738
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    • 2006
  • As the film transistor-liquid crystal display (TFTLCD) panels become larger and provide higher resolution, the propagation delay of row and column lines, the voltage modulation of Vcom, and the response time of liquid crystal affect the display images now more than in the past. It is more important to understand the electrical characteristic of TFT-LCD panels these days. This paper describes the electrical model of a 15-inch XGA ($1024{\times}768$) TFT-LCD panel. The parasitic resistance and capacitance of its panel are obtained by 3D simulation of a sub pixel. The accuracy of these data is verified by the measured values in an actual panel [1]. The developed panel simulation platform, the equivalent circuit of a 15-inch XGA panel, is simulated by HSPICE. The results of simulation are compared with those of experiment, according to changing the width of signal. Especially, the proposed simulation platform for modeling TFTLCD panels can be applied to large size LCD TVs. It can help panel and circuit designers to verify their ideas without making actual panels and circuits.

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An Efficient Multicast Scheme for Hierarchical Mobile IPv6 (계층적 Mobile IPv6를 위한 효율적 멀티캐스트 방안)

  • Kim, Byung-Soon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.7A
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    • pp.597-602
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    • 2005
  • This paper proposes an efficient multicast scheme for the hierarchical mobile IPv6(HMIPv6). If a mobility anchor point(MAP) in a new domain does not support multicasting, an entering group member cannot join the multicast group through the new MAP The group member thus keeps receiving multicast packets from its home agent(HA) using Mobile IPv6 (MIPv6). This increases the propagation delay of binding update (BU) messages. However, our scheme enables an entering group member to keep receiving packets from the old multicast MAP. It can also reduce tunneling costs, total delivery costs and handover latency. We simulated the performance of our scheme by comparing it with the seamless multicast handover in a hierarchical mobile Pv6 (M-HMIPv6) using the delivery cost and handover latency factors.

Thin Films Deposition Study Using Plasma Enhanced CVD with Low Dielectric Materials DEMS(diethoxymethlysiliane) below 45nm (PE-CVD를 이용한 45nm이하급 저유전물질 DEMS(Diethoxymethylsiliane) 박막증착연구)

  • Kang, Min-Goo;Kim, Dae-Hee;Kim, Yeong-Cheol;Seo, Hwa-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.148-148
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    • 2008
  • Low-k dielectric materials are an alternative plan to improve the signal propagation delay, crosstalk, dynamic power consumption due to resistance and parasitic capacitance generated the decrease of device size. Now, various materials is studied for the next generation. Diethoxymethlysiliane (DEMS) precursor using this study has two ethoxy groups along with one methyl group attached to the silicon atoms. SiCOH thin films were deposited on p-type Si(100) substrate by Plasma Enhanced Chemical Vapor Deposition (PECVD) using DEMS. In this study, we studied the effect of oxygen($O_2$) flow rate for DEMS to characteristics of thin films. The characteristics of thin films deposited using DEMS and $O_2$ evaluated through refractive index, dielectric constant(k), surface roughness, I-V(MIM:Al / SiCOH / Ag), C-V(MIM), deposition rate.

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Device and Circuit Level Performance Comparison of Tunnel FET Architectures and Impact of Heterogeneous Gate Dielectric

  • Narang, Rakhi;Saxena, Manoj;Gupta, R.S.;Gupta, Mridula
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.3
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    • pp.224-236
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    • 2013
  • This work presents a comparative study of four Double Gate tunnel FET (DG-TFET) architectures: conventional p-i-n DG-TFET, p-n-p-n DG-TFET, a gate dielectric engineered Heterogate (HG) p-i-n DG-TFET and a new device architecture with the merits of both Hetero Gate and p-n-p-n, i.e. HG p-n-p-n DG-TFET. It has been shown that, the problem of high gate capacitance along with low ON current for a p-i-n TFET, which severely hampers the circuit performance of TFET can be overcome by using a p-n-p-n TFET with a dielectric engineered Hetero-gate architecture (i.e. HG p-n-p-n). P-n-p-n architecture improves the ON current and the heterogeneous dielectric helps in reducing the gate capacitance and suppressing the ambipolar behavior. Moreover, the HG architecture does not degrade the output characteristics, unlike the gate drain underlap architecture, and effectively reduces the gate capacitance.

An Experimental Study on Diesel Spray Dynamics and Auto-Ignition Characteristics to use Rapid Comperssion Machine (RCM을 이용한 디젤 분무 거동 및 자발화 특성에 관한 실험적 연구)

  • Ahn, J.H.;Kim, H.M.;Shin, M.C.;Kim, S.W.
    • Journal of ILASS-Korea
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    • v.8 no.3
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    • pp.33-40
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    • 2003
  • The low-emission and high-performance diesel combustion is an important issue in the combustion research community, In order to understand the detailed diesel flame involving the complex physical processes, it is quite desirable to diesel spray dynamics, auto-ignition and spray flame propagation. Dynamics of fuel spray is a crucial element for air-fuel mixture formation, flame stabilization and pollutant formation, In the present study, the diesel RCM (Rapid Compression Machine) and the Electric Control injection system have been designed and developed to investigate the effects of injection pressure, injection timing, and intake air temperature on spray dynamics and diesel combustion processes, In terms of the macroscopic spray combustion characteristics, it is observed that the fuel jet atomization and the droplet breakup processes become much faster by increasing the injection pressure and the spray angle, With increasing the cylinder pressure, there is a tendency that the of spray pattern in the downstream region tends to be spherical due to the increase of air density and the corresponding drag force, Effects of intake temperature and injection pressure on auto-ignition is experimently analysed and discussed in detail.

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Design of Ultrasound Dynamic Focusing Systems (초음파 다이나믹 집속 시스템의 설계)

  • 김진하;김청월
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.4
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    • pp.65-71
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    • 1984
  • The design formular of optical focusing systems cannot be applied to ultrasonic B scanners, which use broadband pulses instead of continuous wave. In this paper, a calculation method is studied for analyzing the propagation of ultrasonic broadband pulse excited by ultrasonic array transducers. Using the results, seveial design parameters such as the number of transducer elements, delay time, and the focal point are determined to obtain high resolution in the ultrasonic dynamic focusing system. A dynamic focusing system with low-noise switching characteristics; which attains lateral resolution of 2-3mm all along the axial direction up to 18 cm with a 3.5 MHz linear array transducer, was implemented.

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Performance Investigation of Insulated Shallow Extension Silicon On Nothing (ISE-SON) MOSFET for Low Volatge Digital Applications

  • Kumari, Vandana;Saxena, Manoj;Gupta, R.S.;Gupta, Mridula
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.6
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    • pp.622-634
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    • 2013
  • The circuit level implementation of nanoscale Insulated Shallow Extension Silicon On Nothing (ISE-SON) MOSFET has been investigated and compared with the other conventional devices i.e. Insulated Shallow Extension (ISE) and Silicon On Nothing (SON) using the ATLAS 3D device simulator. It can be observed that ISE-SON based inverter shows better performance in terms of Voltage Transfer Characteristics, noise margin, switching current, inverter gain and propagation delay. The reliability issues of the various devices in terms of supply voltage, temperature and channel length variation has also been studied in the present work. Logic circuits (such as NAND and NOR gate) and ring oscillator are also implemented using different architectures to illustrate the capabilities of ISE-SON architecture for high speed logic circuits as compared to other devices. Results also illustrates that ISE-SON is much more temperature resistant than SON and ISE MOSFET. Hence, ISE-SON enables more aggressive device scaling for low-voltage applications.

Design of a Full-Adder Using Current-Mode Multiple-Valued Logic CMOS Circuits (전류 모드 다치 논리 CMOS 회로를 이용한 전가산기 설계)

  • Lee, Yong-Seop;Gwak, Cheol-Ho;Kim, Jeong-Beom
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.1
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    • pp.76-82
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    • 2002
  • This paper presents a quaternary-binary decoder, a quaternary logic current buffer, and a quaternary logic full-adder using current-mode multiple-valued logic CMOS circuits. Proposed full-adder requires only 15 MOSFET, 60.5% and 48.3% decrease of devices are achieved compared with conventional binary CMOS full-adder and Current's full-adder. Therefore, decrease of area and internal nods are achieved. Designed circuits are simulated and verified by HSPICE. Proposed full-adder has 1.5 ns of propagation delay and 0.42㎽ of power consumption. Also, proposed full-adder can easily adapted to binary system by use of encoder, designed decoder and designed current buffer.