• Title/Summary/Keyword: Decoding delay

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An Efficient Iterative Decoding Stop Criterion Algorithm for Reducing Computation of Turbo Code (터보부호의 계산량 감소를 위한 효율적인 반복중단 알고리즘)

  • Jeong Dae-Ho;Lim Soon-Ja;Kim Hwan-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.6 s.336
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    • pp.9-16
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    • 2005
  • It is well blown about the fact that turbo code has better the BER performance as the number of decoding iterations increases in the AWGN channel environment. However, as the number of decoding iterations is increased under the several channel environments, any further iteration results in very little improvement, and it requires much delay and computation in proportion to the number of decoding iterations. In this paper, it proposes the efficient iterative decoding stop criterion algorithm which can largely reduce the computation and the average number of decoding iterations of turbo code. Through simulations, it is verifying that the proposed algorithm can efficiently stop the iterative decoding by using the variance value of LLR and can largely reduce the computation and the average number of decoding iterations without BER performance degradation. As a result of simulation, the computation for the proposed algerian is reduced by about $40\%$ compared to conventional CE algorithm. The average number of decoding iterations for the proposed algorithm is reduced by about $9.94\%$ and $8.32\%$ compared to conventional HDA and SCR algorithm respectively, and by about $2.16\%{\~}7.84\%$ compared to conventional CE algorithm.

A Study on Iterative MAP-Based Turbo Code over CDMA Channels (CDMA 채널 환경에서의 MAP 기반 터보 부호에 관한 연구)

  • 박노진;강철호
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.12a
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    • pp.13-16
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    • 2000
  • In the recent mobile communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that need great many delay over the reception process. Moreover, Turbo Code has been known as the robust coding methods with the confidence over the fading channel. The International Telecommunication Union(ITU) has recently adopted as the standardization of the channel coding over the third generation mobile communications the same as IMT-2000. Therefore, in this paper, we proposed of that has the better performance than existing Turbo Decoder that has the parallel concatenated four-step structure using MAP algorithm. In the real-time voice and video service over the third generation mobile communications, the performance of the proposed method was analyzed by the reduced decoding delay using the variable decoding method by computer simulation over AWGN and lading channels.

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A Study on High Speed LDPC Decoder Algorithm Based on DVB-S2 Standard (멀티미디어 기반 해상통신을 위한 DVB-S2 기반 고속 LDPC 복호를 위한 알고리즘에 관한 연구)

  • Jung, Ji Won;Kwon, Hae Chan;Kim, Yeong Ju;Park, Sang Hyuk;Lee, Seong Ro
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.3
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    • pp.311-317
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    • 2013
  • In this paper, we proposed high speed LDPC decoding algorithm based on DVB-S2 standard for applying marine communications in order to multimedia transmission. For implementing the high speed LDPC decoder, HSS algorithm which reduce the iteration numbers without performance degradation is applied. In HSS algorithm, check node update units are update at the same time of bit node update. HSS can be accelerated to the decoding speed because it does not need to separate calculation of the bit nodes, However, check node calculation blocks need many clocks because of just one memory is used. Therefore, this paper proposed partial memory structure in order to reduced the delay and high speed decoder is possible. The results of the simulation, when the max number of iteration set to 30 times, decoding throughput of HSS algorithm is 326 Mbit/s and decoding speed of proposed algorithm is 2.29 Gbit/s. So, decoding speed of proposed algorithm more than 7 times could be obtained compared to the HSS algorithm.

Performance of LDPC Decoder of HSS based on Non-Uniform Quantization (비균일 양자화 방식 기반 HSS 방식의 LDPC 복호기 성능)

  • Kim, Tae-Hun;Kwon, Hae-Chan;Jung, Ji-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.9
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    • pp.2029-2035
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    • 2013
  • In this paper, we presented non-uniform quantization method for LDPC decoder specified in DVB-S2 standard. There are some problems in order to implement LDPC decoder in aspect to algorithm and implementation. In algorithm aspect, because of large number of iterations, LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. Therefore, this paper studies Horizontal Shuffle Scheduling (HSS) algorithm which reduced iteration number without performance loss. In aspect of implementation, there are some solutions to improve the decoding speed, however this paper focused on non-uniform quantization which reduce the quantization bits of LDPC decoder. In simulation results, Decoding throughput of HSS LDPC decoder based on non-uniform quantization is 816Mbps and it improved 12% compared to conventional one.

Performance Comparison of Fast Distributed Video Decoding Methods Using Correlation between LDPCA Frames (LDPCA 프레임간 상관성을 이용한 고속 분산 비디오 복호화 기법의 성능 비교)

  • Kim, Man-Jae;Kim, Jin-Soo
    • The Journal of the Korea Contents Association
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    • v.12 no.4
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    • pp.31-39
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    • 2012
  • DVC(Distributed Video Coding) techniques have been attracting a lot of research works since these enable us to implement the light-weight video encoder and to provide good coding efficiency by introducing the feedback channel. However, the feedback channel causes the decoder to increase the decoding complexity and requires very high decoding latency because of numerous iterative decoding processes. So, in order to reduce the decoding delay and then to implement in a real-time environment, this paper proposes several parity bit estimation methods which are based on the temporal correlation, spatial correlation and spatio-temporal correlations between LDPCA frames on each bit plane in the consecutive video frames in pixel-domain Wyner-Ziv video coding scheme and then the performances of these methods are compared in fast DVC scheme. Through computer simulations, it is shown that the adaptive spatio-temporal correlation-based estimation method and the temporal correlation-based estimation method outperform others for the video frames with the highly active contents and the low active contents, respectively. By using these results, the proposed estimation schemes will be able to be effectively used in a variety of different applications.

BER PERFORMANCE ANALYSIS OF CYCLIC DELAY DIVERSITY (CDD) TECHNIQUE WITH TURBO FEC (Turbo FEC를 장착한 COD(Cyclic Delay Diversity)기술의 BER 성능분석)

  • Kim, Dong-Bae;Oh, Tae-Won
    • Proceedings of the KIEE Conference
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    • 2008.10b
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    • pp.396-397
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    • 2008
  • OFDM 송수신 시스템에서 채널성능을 개선하기 위해 CDD(Cyclic Delay Diversity) 기술을 적용하면, Frequency Interlea ving의 영향으로 인해 burst error가 randomize되어, convolutional code/Viterbi decoding FEC의 BER 성능개선 효과를 배가 할 수 있다. 그러나 차세대 통신시스템에 적극 활용되는 Turbo FEC는 자체 interleaving 구조를 가지고 있으므로, CDD기술과의 결합으로 인한 영향을 증명하기 위하여, 본 논문에서는 Turbo FEE를 사용하는 OFDM CDD시스템을 MATLAB을 이용한 computer simulation을 통해서 BER 성능을 비교분석 하였다.

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Design of Triple-Error-Correcting Reed-Solomon Decoder using Direct Decoding Method (Reed-Solomon 부호의 직접복호법을 이용한 3중 오류정정 복호기 설계)

  • 조용석;박상규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.8A
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    • pp.1238-1244
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    • 1999
  • In this paper, a new design of a triple-erroe-correcting (TEC) Reed-Solomon decoder is presented based on direct decoding method which is more efficient for the case of relatively small error correction capability. The proposed decoder requires only 9 GF(2m) multipliers in obtaining the error-locator polynomial and the error-evaluator polynomial, whereas other decoders needs 24 multipliers. Thus, the attractive feature of this decoder is its remarkable simplicity from the point of view of implementation. Futhermore, the proposed TEC Reed-Solomon decoder has very simple control circuit and short decoding delay. Therefore this decoder can be implemented by simple hardware and also save buffer memory which stores received sequence.

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An Efficient CPM Adaptive Decoding Technique over the Burst Error Channel (연집 오류 채널에 효율적인 CPM 적응복호 방식)

  • 정종문;김대중;정호영;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.8
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    • pp.1548-1557
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    • 1994
  • In this paper, the dual mode error correcting adaptive decoding algorithm which is adapted to the continuous phase frequency shift keying(CPFSK) modulation is presented as a technique for overcoming the distortion that reveals from the Rayleigh fading channel. The dual mode adaptive decoder nominally operates as a Viterbi decoder and switches to the burst error correcting mode, whenever the decoder detects an uncorrectable burst error pattern. Under the fading channel environment and when the usable memory quantity is restricted, the dual mode adaptive decoding algorithm shows an advantage in the BER performance over the interleaving technique, and also obtains the merit of not needing the large time delay that the interleaving technique requires. The experimental results from the computer simulation demonstrate the performance of the algorithm and verify the theoretical results.

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Tiled Image Compression Method to Reduce the Amount of Memory Needed for Image Processing in Mobile Devices (모바일 단말기에서 이미지 처리에 필요한 메모리 사용량을 줄이기 위한 타일화 이미지 압축 기법)

  • Oh, Hwang-Seok
    • Journal of Korea Game Society
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    • v.13 no.6
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    • pp.35-42
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    • 2013
  • A new compressed image format is proposed to use a large size of image in mobile games without the constraints of hardware specifications such as memory amount, processing power, which encodes each block of a large size image in scan line order. Using the experiments, we show the effectiveness of proposed method compared with a general PNG in terms of compression ratios and required memory in decoding processes. Also, the loading delay can be reduced by decoding only the displaying area of a large image in run-time.

Design of A Reed-Solomon Decoder for UWB Systems (UWB 시스템 용 Reed-Solomon 복호기 설계)

  • Cho, Yong-Suk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.4C
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    • pp.191-196
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    • 2011
  • In this paper, we propose a design method of Reed-Solomon (23, 17) decoder for UWB using direct decoding method. The direct decoding algorithm is more efficient for the case of relatively small error correction capability. The proposed decoder requires only 9 $GF(2^m)$ multipliers in obtaining the error-locator polynomial and the error-evaluator polynomial, whereas other decoders need about 20 multipliers. Thus, the attractive feature of this decoder is its remarkable simplicity from the point of view of hardware implementation. Futhermore, the proposed decoder has very simple control circuit and short decoding delay. Therefore this decoder can be implemented by simple hardware and also save buffer memory which stores received sequence.