• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.28 no.4C
• /
• pp.365-373
• /
• 2003

In this paper, we design a versatle RS decoder which can decode RS codes of any block length n as well as any message length k, based on a modified Euclid's algorithm (MEA). This unique feature is favorable for a shortened RS code of any block length it eliminates the need to insert zeros before decoding a shortened RS code. Furthermore, the value of error correcting capability t can be changed in real time at every codeword block. Thus, when a return channel is available, the error correcting capability can be adaptiverly altered according to channel state. The decoder permits 4-step pipelined processing : (1) syndrome calculation (2) MEA block (3) error magnitude calculation (4) decoder failure check. Each step is designed to form a structure suitable for decoding a RS code with varying block length. A new architecture is proposed for a MEA block in step (2) and an architecture of outputting in reversed order is employed for a polynomial evaluation in step (3). To maintain to throughput rate with less circuitry, the MEA block uses not only a multiplexing and recursive technique but also an overclocking technique. The adaptive RS decoder over GF($2^8$) with the maximal error correcting capability of 10 has been designed in VHDL, and successfully synthesized in a FPGA.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.14 no.1
• /
• pp.1-6
• /
• 2021

In this paper, in order to mitigate ISI(inter-symbol interference) in a diffusion-based molecular communication channel, an ISI Hamming code is proposed in which ISI characteristics are applied to a channel decoding algorithm. In order to prove the bit error rate performance of the proposed channel code, the bit error rate performance of the major channel codes applied to the molecular communication channel with ISI was compared and analyzed through simulation. From the simulation results, it can be seen that the bit error rate performance of the ISI Hamming code is the best when the number of radiated molecules is less than or equal to 1100. In addition, when the number of transmitted molecules is M=1000, the decoding method of the ISI Hamming code proposed in this paper has improved the bit error rate of approximately 5.9×10-5 compared to the Hamming code using only soft values. Compared with the ISI-mitigating channel code, which is effective for removing ISI in the molecular communication channel, the ISI Hamming code proposed in this paper is the most advantageous in a channel environment where the number of transmitted molecules is not big (M<1100). And we can see that the ISI-mitigating channel code is more advantageous when the number of transmitted molecules is large(M>1100).

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.45 no.2
• /
• pp.26-32
• /
• 2008

Video compression schemes have been developed and used for many years. Currently, H.264/AVC is the most efficient video coding standard. The H.264/AVC baseline profile adopts CAVLC(Context-Adaptive Variable Length Coding) method as an entropy coding method. CAVLC gives better performance in compression ratios than conventional VLC(Variable Length Coding). However, because CAVLC decoder uses a lot of VLC tables, the CAVLC decoder requires a lot of area in terms of hardware. Conversely, since it must look up the VLC tables, it gives a worse performance in terms of software. In this paper, we propose a new hierarchical grouping method for the VLC tables. We can obtain an index of codes in the reconstructed VLC tables by simple arithmetic operations. In this method, the VLC tables are accessed just once in decoding a symbol. We modeled the proposed algorithm in C language, compiled under ARM ADS1.2 and simulated it with Armulator. Experimental results show that the proposed algorithm reduces execution time by about 80% and 15% compared with the H.264/AVC reference program JM(Joint Model) 10.2 and the arithmetic operation algorithm which is recently proposed, respectively.

• Journal of the Institute of Electronics Engineers of Korea TE
• /
• v.39 no.4
• /
• pp.355-355
• /
• 2002

In this paper, we designed a FPU(floating point unit) that it is very important and requires of high density when digital audio is designed. Almost audio system must support the multi-channel and required for high quality. A floating point arithmetic function in MPEG-2 AAC that implemented by hardware is able to realtime decoding when DSP realization. The reason is that MPEG-2 AAC is compatible to the Audio field of MPEG-4 and afterwards. We designed a FPU by hardware to increase the speed of a floating point unit with much calculation part in the MPEG-2 AAC Decoder. A FPU is composed of a multiplier and an adder. A multiplier used the Radix-4 Booth algorithm and an adder adopted 1's complement method for speed up. A form of a floating point unit has 8bit of exponent part and 24bit of mantissa. It's compatible with the IEEE single precision format and adopted a pipeline architecture to increase the speed of a processor. All of sub blocks are based on ISO/IEC 13818-7 standard. The algorithm is tested by C language and the design does by use of VHDL(VHSIC Hardware Description Language). The maximum operation speed is 23.2MHz and the stable operation speed is 19MHz.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.48 no.4
• /
• pp.107-115
• /
• 2011

In this paper, we proposed fast and efficient algorithm for detecting near-duplication based on content based retrieval in large scale video database. For handling large amounts of video easily, we split the video into small segment using scene change detection. In case of video services and copyright related business models, it is need to technology that detect near-duplicates, that longer matched video than to search video containing short part or a frame of original. To detect near-duplicate video, we proposed motion distribution and frame descriptor in a video segment. The motion distribution descriptor is constructed by obtaining motion vector from macro blocks during the video decoding process. When matching between descriptors, we use the motion distribution descriptor as filtering to improving matching speed. However, motion distribution has low discriminability. To improve discrimination, we decide to identification using frame descriptor extracted from selected representative frames within a scene segmentation. The proposed algorithm shows high success rate and low false alarm rate. In addition, the matching speed of this descriptor is very fast, we confirm this algorithm can be useful to practical application.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.49 no.2
• /
• pp.113-121
• /
• 2012

In this paper, we proposed fast and efficient algorithm for detecting near-duplication based on content based retrieval in large scale video database. For handling large amounts of video easily, we split the video into small segment using scene change detection. In case of video services and copyright related business models, it is need to technology that detect near-duplicates, that longer matched video than to search video containing short part or a frame of original. To detect near-duplicate video, we proposed motion distribution and frame descriptor in a video segment. The motion distribution descriptor is constructed by obtaining motion vector from macro blocks during the video decoding process. When matching between descriptors, we use the motion distribution descriptor as filtering to improving matching speed. However, motion distribution has low discriminability. To improve discrimination, we decide to identification using frame descriptor extracted from selected representative frames within a scene segmentation. The proposed algorithm shows high success rate and low false alarm rate. In addition, the matching speed of this descriptor is very fast, we confirm this algorithm can be useful to practical application.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.11
• /
• pp.14-23
• /
• 2002

Two implementation methods for SOVA (Soft Output Viterbi Algorithm)of Turbo decoder are applied and verfied. The first method is the combination of a trace back (TB) logic for the survivor state and a double trace back logic for the weight value in two-step SOVA. This architecure of two-setp SOVA decoder allows important savings in area and high-speed processing compared with that of one-step SOVA decoding using register exchange (RE) or trace-back (TB) method. Second method is adjusting the reliability value with a scaling factor between 0.25 and 0.33 in order to compensate for the distortion for a rate 1/3 and 8-state SOVA decoder with a 256-bit frame size. The proposed schemes contributed to higher SNR performance by 2dB at the BER 10E-4 than that of SOVA decoder without a scaling factor. In order to verify the suggested schemes, the SOVA decoder is testd using Xillinx XCV 1000E FPGA, which runs at 33.6MHz of the maximum speed with 845 latencies and it features 175K gates in the case of 256-bit frame size.

• Journal of Korea Multimedia Society
• /
• v.14 no.7
• /
• pp.849-857
• /
• 2011

Gaming on demand(GOD) makes people enjoy games by encoding and transmitting game screen at a server side, and decoding the video at a client side. In this paper, we propose a fast game video encoder for multiple users over network with low-powered devices. In the proposed system, the computational complexity of game encoders is reduced by using scene descriptors, which consists of an object motion vector, global motion, and scene change. With additional information from game engines, the proposed encoder does not need to perform various complexity processes such as motion estimation and ratedistortion optimization. The motion estimation and rate-distortion optimization skipped by scene descriptors. We found that the proposed method improved 192 % in terms of FPS, compared with x264 software. With partial assembly code, we also improved coding speed by 86 % in terms of FPS. We found that the proposed fast encoder could encode over 60 FPS for real-time GOD applications.

• Journal of Advanced Navigation Technology
• /
• v.17 no.1
• /
• pp.98-106
• /
• 2013

In this paper, we propose a moving object detection and tracking method for multi-view camera environment. Based on the similarity and characteristics of motion vectors and coding block modes extracted from compressed bitstreams, validation of moving blocks, labeling of the validated blocks, and merging of neighboring blobs are performed. To continuously track objects for temporary stop, crossing, and overlapping events, a window based object updating algorithm is proposed for single- and multi-view environments. Object detection and tracking could be performed with an acceptable level of performance without decoding of video bitstreams for normal, temporary stop, crossing, and overlapping cases. The rates of detection and tracking are over 89% and 84% in multi-view environment, respectively. The rates for multi-view environment are improved by 6% and 7% compared to those of single-view environment.

• Journal of Broadcast Engineering
• /
• v.6 no.2
• /
• pp.121-130
• /
• 2001

We propose an efficient DCT-domain video transcoding algorithm for flexible for bit-rate video communications. Video transcoding provides communication fiexibility by adaptively changing the bit-rate of compressed bit stream. During the transcoding process, adrift error is unavoidable because of the difference between reference images in the series of encoding and decoding. For solving the drift error problem, cascade pixel-domain transcoder (CPDT) has been proposed. CPDT, however, requires highly complex hardware and heavy computational overhead. In this paper we propose a DCT-domain transcoding technique, which enables efficient transcoding without any drift error. The proposed cascade DCT-domain transcoder (CDDT) is realized by new motion compensation and down-sampling methods in the DCT-domain.