• Title/Summary/Keyword: Data simulator

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Integration of Proximity-based Services with Vehicular Ad-hoc Networks (교통 기관 애드혹 네트워크 와 Proximity기반 서비스의 통합)

  • Diouf, Elhadji Makhtar
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.05a
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    • pp.126-129
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    • 2015
  • Device-to-device (D2D) communications, a subset of Proximity-based Services that enables direct communication between LTE network subscribers, is gaining popularity. It is well underway to be adopted in cellular communication systems for pedestrian and connected-vehicles alike. In this paper, we briefly present our model of an Evolved Packet Core Network-assisted device discovery simulator and show the applicability of Proximity-based Services for Vehicular Ad-hoc Networks. Through the performance evaluation based on the developed simulation environment, it is shown that in case when users gather in the same vicinity, as in public transportation, LTE network data can be efficiently offloaded and multicasted through Wi-Fi for e.g. delivering traffic-related information and for the benefit of infotainment service consumers.

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An Adaptive Power-Controlled Routing Protocol for Energy-limited Wireless Sensor Networks

  • Won, Jongho;Park, Hyung-Kun
    • Journal of information and communication convergence engineering
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    • v.16 no.3
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    • pp.135-141
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    • 2018
  • Wireless sensor networks (WSN) are composed of a large number of sensor nodes. Battery-powered sensor nodes have limited coverage; therefore, it is more efficient to transmit data via multi-hop communication. The network lifetime is a crucial issue in WSNs and the multi-hop routing protocol should be designed to prolong the network lifetime. Prolonging the network lifetime can be achieved by minimizing the power consumed by the nodes, as well as by balancing the power consumption among the nodes. A power imbalance can reduce the network lifetime even if several nodes have sufficient (battery) power. In this paper, we propose a routing protocol that prolongs the network lifetime by balancing the power consumption among the nodes. To improve the balance of power consumption and improve the network lifetime, the proposed routing scheme adaptively controls the transmission range using a power control according to the residual power in the nodes. We developed a routing simulator to evaluate the performance of the proposed routing protocol. The simulation results show that the proposed routing scheme increases power balancing and improves the network lifetime.

A Study on Secure Routing Protocol using Multi-level Architecture in Mobile Ad Hoc Network (Multi-level 구조를 이용한 보안 라우팅 프로토콜에 관한 연구)

  • Yang, Hwan Seok
    • Convergence Security Journal
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    • v.14 no.7
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    • pp.17-22
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    • 2014
  • Wireless Ad hoc Network is threatened from many types of attacks because of its open structure, dynamic topology and the absence of infrastructure. Attacks by malicious nodes inside the network destroy communication path and discard packet. The damage is quite large and detecting attacks are difficult. In this paper, we proposed attack detection technique using secure authentication infrastructure for efficient detection and prevention of internal attack nodes. Cluster structure is used in the proposed method so that each nodes act as a certificate authority and the public key is issued in cluster head through trust evaluation of nodes. Symmetric Key is shared for integrity of data between the nodes and the structure which adds authentication message to the RREQ packet is used. ns-2 simulator is used to evaluate performance of proposed method and excellent performance can be performed through the experiment.

4H-SiC High Power VJFET with modulation of n-epi layer and channel dimension (N-epi 영역과 Channel 폭에 따른 4H-SiC 고전력 VJFET 설계)

  • Ahn, Jung-Joon;Bahng, Wook;Kim, Sang-Cheol;Kim, Nam-Kyun;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.350-350
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    • 2010
  • Silicon carbide (SiC), one of the well known wide band gap semiconductors, shows high thermal conductivities, chemical inertness and breakdown energies. The design of normally-off 4H-SiC VJFETs [1] has been reported and 4H-SiC VJFETs with different lateral JFET channel opening dimensions have been studied [2]. In this work, 4H-SiC based VJFETs has been designed using the device simulator (ATLAS, Silvaco Data System, Inc). We varied the n-epi layer thickness (from $6\;{\mu}m$ to $10\;{\mu}m$) and the channel width (from $0.9\;{\mu}m$ to $1.2\;{\mu}m$), and investigated the static characteristics as blocking voltages, threshold voltages, on-resistances. We have shown that silicon carbide JFET structures of highly intensified blocking voltages with optimized figures of merit can thus be achieved by adjusting the epi layer thickness and channel width.

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YFY-LCD Pixel Design for Large Size, High Quality using PDAST(Pixel Design Array Simulator) (화소 설계 어레이 시뮬레이터 (PDAST)를 이용한 대면적 고화질을 위한 TFT-LCD의 화소설계)

  • Lee, Young-Sam;Youn, Young-Jun;Jeong, Sun-Sin;Choi, Jong-Sun
    • Proceedings of the KIEE Conference
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    • 1998.07d
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    • pp.1364-1366
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    • 1998
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay. pixel charging ratio, level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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Implementation of a Fieldbus System Based on Profibus-DP Protocol (Profibus-DP 프로토콜을 이용한 필드버스 시스템 구현)

  • Bae, Gyu-Sung;Kim, Jong-Bae;Park, Byoung-Wook;Lim, Kye-Young
    • Journal of Institute of Control, Robotics and Systems
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    • v.6 no.10
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    • pp.903-910
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    • 2000
  • In this paper, we describe a slave chip based on the Profibus-DP protocol and a system board to verify the developed slave chip. The Profibus-DP protocol is designed using VHDL and implemented on FPGA. The system board adopting the developed FPGA is designed FPGA is designed in which the firmware is implemented on Intel 8051 by using C language. Among the Profibus-DP protocols, low level layers from the physical layer to the data link layer is implemented in the form of hardware that we are able to greatly reduce the CPU load in processing protocols, and then higher layers could be processed by software. These technologies result in an IP to make terminal devices in the distributed control systems. Therefore, many digital logics as well as communication logics can be implemented onto SOC(System On a Chip) and it could be applied to various fieldbus-related areas.

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Branch Predictor Design and Its Performance Evaluation for A High Performance Embedded Microprocessor (고성능 내장형 마이크로프로세서를 위한 분기예측기의 설계 및 성능평가)

  • Lee, Sang-Hyuk;Kim, Il-Kwan;Choi, Lynn
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.129-132
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    • 2002
  • AE64000 is the 64-bit high-performance microprocessor that ADC Co. Ltd. is developing for an embedded environment. It has a 5-stage pipeline and uses Havard architecture with a separated instruction and data caches. It also provides SIMD-like DSP and FP operation by enabling the 8/16/32/64-bit MAC operation on 64-bit registers. AE64000 processor implements the EISC ISA and uses the instruction folding mechanism (Instruction Folding Unit) that effectively deals with LERI instruction in EISC ISA. But this unit makes branch prediction behavior difficult. In this paper, we designs a branch predictor optimized for AE64000 Pipeline and develops a AES4000 simulator that has cycle-level precision to validate the performance of the designed branch predictor. We makes TAC(Target address cache) and BPT(branch prediction table) seperated for effective branch prediction and uses the BPT(removed indexed) that has no address tags.

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Three-dimensional Modeling of Transient Enhanced Diffusion (과도 증속 확산(TED)의 3차원 모델링)

  • 이제희;원태영
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.6
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    • pp.37-45
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    • 1998
  • In this paper, we report the first three-dimensional simulation result of the transient enhanced diffusion(TED) of dopants in the ion-implanted silicon by employing our 3D semiconductor process simulator, INPROS system. In order to simulate three-dimensional TED redistribution of dopants in silicon, the dopant distributions after the ion implantation was calculated by Monte Carlo(MC) method, followed by finite element(FE) numerical solver for thermal annealing. Excellent agreement between the simulated 3D profile and the SIMS data has been obtained for ion-implanted arsenic and phosphorus after annealing the boron marker layer at 75$0^{\circ}C$ for 2 hours. Our three-dimensional TED simulation could successfully explain the reverse short channel effect(RSCE) by taking the 3D point defect distribution into account. A coupled TED simulation and device simulation allows reverse short channel effect on threshold to be accurately predicted.

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A vision system for autonomous material handling by static and dynamic range finding (정적 및 동적 range 검출에 의한 원료 처리 자동화용 vision 시스템)

  • 안현식;최진태;이관희;신기태;하영호
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.34S no.10
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    • pp.59-70
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    • 1997
  • Until now, considerable progress has been made in the application of range finding techanique performing direct 3-D measurement from the object. However, ther are few use of the method in the area of the application of material handing. We present a range finding vision system consisting of static and dynamic range finders to automate a reclaimer used for material handling. A static range finder detects range data of the front part of the piles of material, and a height map is obtained from the proposed image processing algorithm. The height map is used to calculate the optimal job path as features for required information for material handling function. A dynamic range finder attached on the side of the arm of the reclaimer detects the change of the local properties of the material with the handling function, which is used for avoiding collision and detecting the ending point for changing direction. the developed vision systm was applied to a 1/20 simulator and the results of test show that it is appropriate to use for automating the material handling.

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Numerical Evaluation of Impurity Profile in Silicon (수치해법에 의한 실리콘에서의 불순물 분포의 산출)

  • 오형철;경종민
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.6
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    • pp.17-26
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    • 1984
  • A computer program (DIFSIM: Diffusion SIMulator) was written to calculate the impurity profile, specifically boron and phosphorus, due to three different diffusion processes-predeposition, drive-in in inert ambient, and drive-in in oxidizing ambient. The vacancy mechanism including Fair and Tsai's theory for phosphDrus diffusion was widely incorporated for modeling various diffusion processes. The concentrationtependent oxidation rate was also explained using the vacancy model, while the oxidation - enhanced diffusion was mo dolled using catkins replacement mochanlsm . The simulation results using DIFSIM showed a fairly good agreement with the experimental data by adjusting some of the empirical parameters in the program. The results obtained using DIFSIM were compared with the results from SUPREM II.

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