• Proceedings of the Korean Society of Computer Information Conference
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• 2014.07a
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• pp.503-505
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• 2014

지능형 웹의 확장을 위해 링크드 데이터(Linked Open Data)를 통한 표준화 연구가 활발하게 진행되고 있다. 뿐만 아니라 링크드 데이터는 RDF, SPARQL을 이용한 정보를 더욱 더 지능적이고 다양한 분야에 적용 할 수 있는 방법으로 제시되고 있다. 하지만 이기종 환경에서는 각각 서로 다른 데이터 형식을 지니게 되므로 통합환경을 구축하는데 어려움이 따른다. 이를 위해 본 논문에서는 다양한 이기종 환경에서의 데이터 형식 변환이 가능한 RDF 컨버터를 제안한다. 제안하는 RDF 컨버터는 SPARQL를 비롯한 다양한 질의어로 데이터의 효율적인 분석, 변환이 가능하다. 성능평가를 통해 RDB 데이터 형식 분석과 RDF 데이터 변환에 대한 정확도를 확인하였고 D2RQ와 Jena2의 비교를 통해 서로 다른 RDB 데이터가 D2RQ에서 변환시간이 4.2% 빠르다는 성능을 증명하였다.

• Journal of Electrical Engineering and Technology
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• v.9 no.3
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• pp.1132-1136
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• 2014

In the context of increasing electric energy consumption in a data center, energy efficiency improvement is strongly emphasized. In a data center, electric energy is largely consumed by DC power supply system, which is based on a rectifier composed by multiple parallel converters. Therefore, rectifier efficiency must be improved for minimizing loss of DC power supply system. Rectifier efficiency can be modulated by load allocation to converters because converter efficiency depends on input AC power. In this paper, we propose a new control method to maximize rectifier efficiency. The method can control load allocation to converters by introducing active power converter control scheme and start-and-stop of converters. In order to illustrate optimal load allocations in a rectifier, a maximization problem of rectifier efficiency is formulated as a nonlinear optimization one. The problem is solved by Lagrangian relaxation method and the computation results provide the validity of proposed method.

• Transactions of the Korean Society of Automotive Engineers
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• v.10 no.1
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• pp.45-50
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• 2002

Use of a phenomenological model, developed far prediction of catalytic deactivation, is demonstrated in comparing harshness of different driving cycles that are currently used to rapidly age catalytic converters on engine test benches. The model shows that seemingly equivalent driving cycles cause the catalytic converters to reach significantly different levels of deactivation. The comparison of the model prediction with the limited vehicle data seems encouraging despite the simplicity of the model at the current stage of its infancy.

• Journal of Advanced Navigation Technology
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• v.24 no.1
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• pp.53-60
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• 2020

In this paper, We have studied the structure of a Telemetry Transmitter capable of transmitting variable data rates. This paper proposed a structure combining variable pre-modulation filter with cutoff characteristic with variable input sample rate converter. Variable pre-modulation filter has the same characteristics as pre-modulation filter and is converted to a constant sampling rate without structural changes according to the variable input data rate. We propose a software program that actively controls variable pre-modulation filter and variable input sample rate converter to respond to real-time changing data.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.3
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• pp.460-465
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• 2007

In this paper, the pipelined A/D converter with multi S/H stage structure is proposed for high resolution and high-speed data conversion rate. In order to improve a resolution and operational speed, the proposed structure increased the sampling time that is sampled input signal. In order to verify the operation characteristics 20MS/s pipelined A/D converter is designed with two S/H stage. The simulation result shows that INL and DNL are $0.52LSB{\sim}-0.63LSB$ and $0.53LSB{\sim}-0.56LSB$, respectively. Also, the designed Analog-to-Digital converter has the SNR of 43dB and power consumption is 18.5mW.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.8
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• pp.10-21
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• 1999

This paper describes a 12bit CMOS current cell matrix D/A converter which shows a conversion rate of 65MHz and a power supply of 3.3V. Designed D/A converter utilizes current cell matrix structure with good monotonicity characteristic and fast settling time, and it is implemented by using the tree structure bias circuit, the symmetrical routing method with ground line and the cascode current switch to reduce the errors of the conventional D/A converter caused by a threshold voltage mismatch of current cells and a voltage drop of the ground line. The designed D/A converter was implemented with a $0.6{\mu}m$ CMOS n-well technology. The measured data shows a settling time of 20ns, a conversion rate of 50 MHz and a power dissipation of 35.6mW with a single power supply of 3.3V. The experimental SNR, DNL, and INL of the D/A converter is measured to be 55dB, ${\pm}0.5LSB$, and ${\pm}2LSB$, respectively.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.5
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• pp.336-342
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• 2017

Recently, there has been an increasing need for underwater communication systems to monitor ocean environments and prevent marine disasters, as well as to secure ocean resources. Most underwater communication systems adopted acoustic communication with a consideration of attenuation, absorption, and scattering in conductive sea water, and developed fully digital modems based on processors. In this study, a digital up converter (DUC) and a digital down converter (DDC) was developed for an underwater basestation based on underwater acoustic communication systems. Because one of the most important issues in underwater acoustic communication systems is low power consumption due to environmental problems, this study developed a specific hardware module for DUC and DDC. It supported four links of underwater acoustic communication systems and converted the sampling rate and frequency. The systemwas designed and verified using Verilog-HDL in ModelSim environment with the test data generated from baseband layer parts for an underwater base station.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.10A
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• pp.776-783
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• 2009

Current-cut circuit is an effective method to obtain low power consumption in wireless communication systems as high speed OFDM. For the operation of current-mode FFT LSI with analog signal processing essentially requires current-mode serial-to-parallel/parallel-to-serial converter with multi input and output structure. However, the Hold-mode operation of current-mode serial-to-parallel/parallel-to-serial converter has unnecessary power consumption. We propose a novel current-mode serial-to-parallel/parallel-to-serial converter with current-cut circuit and full chip simulation results agree with experimental data of low power consumption. The proposed current-mode serial-to-parallel/parallel-to-serial converter promise the wide application of the current-mode analog signal processing in the field of low power wireless communication LSI.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.82-89
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• 2021

This study proposes a DAB two-stage series structure with insulated bidirectional DC-DC converter for two-way power transfer between the renewable energy of high voltages (1 kV and above). The proposed circuit transforms the existing DAB converter into a two-stage series structure to reduce the pressure in the switch. The problem of power imbalance occurring in the design of the DAB converter second-stage series is improved by applying the cell balancing method circuit and the common mode coupled inductor using an external flying capacitor instead of reflecting the existing improvement measures, voltage balance control, and inductor current control. In addition, a no-load supercharging sequence is proposed in high voltages and high-speed switching by using the fixed duty output method. This study presents the analysis results through the structure of the proposed circuit, the principle of improving the power imbalance problem, and simulations. Prototypes were manufactured to meet the specifications of input/output voltage of 1700 V, maximum load of 65 kW, and switching frequency of 51kHz, and the validity of the topology was verified using the experimental results and efficiency data.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2023-2027
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• 1997

This paper presents the dynamic analysis and control-loop design of a zero-voltage-switched full bridge (ZVS-FB) PWM dc/dc converter. Based on the small-signal analysis results, the control-loop is designed using a simple two-pole one-zero compensation circuit. Design results are verified by both computer simulations and experimental data obtained from a 2kW prototype converter.