• Title/Summary/Keyword: Data converter

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Acoustic Noise Reduction and Power Factor Correction in Switched Reluctance Motor Drives

  • Rashidi, Amir;Saghaiannejad, Sayed Mortaza;Mousavi, Sayed Javad
    • Journal of Power Electronics
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    • v.11 no.1
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    • pp.37-44
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    • 2011
  • In this paper, a four-phase 8/6-pole 4-kW SR motor drive model is presented. Based on experimental data, the model allows an accurate simulation of a drive in dynamic operation. Simulations are performed and a laboratory type set-up is built based on a TI TMS320F2812 platform to experimentally verify the theoretical results obtained for a SR motor. To reduce acoustic noise and to correct the power factor of this drive, a two-stage power converter is proposed that uses a current source rectifier (CSR) as the input stage for the asymmetrical converter of the studied SRM. Employing the space-vector modulation (SVM) method in matrix converters, the CSR switching allows the dc link's capacitors to be eliminated and the power factor of the SRM drive to be improved. As the electrical motive force (emf) is directly proportional to the rotor speed, the input voltage to the machine can be programmed to be a function of the speed with the modulation index of the CSR, leading to a reduction in the acoustic noise of the SRM drive. Simulation of the whole SRM drive system is performed using MATLAB-Simulink. The results fully comply with the required conditions such as power factor correction with an improvement in the THD.

Application of MMC-HVDC System for Regulating Grid Voltage Based on Jeju Island Power System (제주계통의 전압조정을 위한 MMC-HVDC 시스템 응용)

  • Quach, Ngoc-Thinh;Kim, Eel-Hwan;Lee, Do-Heon;Kim, Ho-Chan
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.6
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    • pp.494-502
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    • 2014
  • This paper presents a control method of the modular multilevel converter - high-voltage direct current (MMC-HVDC) system to regulate grid voltage on the basis of the Jeju Island power system. In this case, the MMC-HVDC system is controlled as a static synchronous compensator (Statcom) to exchange the reactive power with the power grid. The operation of the MMC-HVDC system is verified by using the PSCAD/EMTDC simulation program. The Jeju Island power system is first established on the basis of the parameters and measured data from the real Jeju Island power system. This power system consists of two line-commutated converter - high-voltage direct current (LCC-HVDC) systems, two Statcom systems, wind farms, thermal power plants, transformers, and transmission and distribution lines. The proposed control method is then applied by replacing one LCC-HVDC system with a MMC-HVDC system. Simulation results with and without using the MMC-HVDC system are compared to evaluate the effectiveness of the control method.

Development of Vibration Analysis Software, PFADS-R3 using Power Flow Analysis (파워흐름해석법을 이용한 진동해석 소프트웨어, PFADS-R3 개발)

  • 홍석윤;서성훈;박영호;길현권
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2003.11a
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    • pp.824-830
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    • 2003
  • The Power Flow Finite Element Method(PFFEM) offers very promising results in predicting the vibration responses of system structures, and the first PFFEM software, PFADS has been developed in Seoul National University for the vibration predictions and analysis of coupled system structures in medium-to-high frequency ranges. PFFEM is numerical method which solves energy governing equation using finite element technique for complicated structures where the exact solutions are not available. Through the upgrades, the current version PFADS R3 could cover the general beam and plate structures including various kinds of beam-plate rigid joints, spring-damper connection and rigid body connection within beam and plate in addition. This software is composed of three parts; translator, model converter and solver. The translator makes its own FE-model from bulk data of commercial FE software, and the model converter is used to convert FE-model to PFFE-model automatically. The solver calculates vibrational energy density and intensity for PFFE-model by solving global matrix equations of PFFEM. For the applications of PFADS R3, two vehicle models and a container model are examined with respect to major parameters, and reliable results are obtained.

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Development of High Resolution Laser Doppler Vibrometer (고 분해능 레이저 도플러 진동계의 개발)

  • Kim, Seong-Hun;Go, Jin-Hwan;Kim, Ho-Seong
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.2
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    • pp.125-131
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    • 2000
  • A high resolution Laser Doppler Vibrometer(LDV) developed using electronic fringe counting method. The fringe pattern signal obtained via analog signal processing is divided into two. One was converted to a TTL signal with a ZCD(zero-crossing detector) and then counted to calculate the displacement due to the vibration. The other was directed to the A/D converter to get a high resolution of about $\lambda/320$ with the phase comparison method. The data obtained with the A/D converter was used in the displacement calculation and the result was displayed on a LCD pane. In this study, a Laser Doppler Vibrometer with measurement range of $0.32\mum~129\mum$ and displacement resolution of 2nm, about $\lambda/320$ , was developed. And this LDV can be used to measure the dynamic of microsize devices such as MEMS(Micro Electro-Mechanical Systems) and to diagnose high capacity electric equipment such as circuit breakers and transformers, of which resonant frequencies are changed when they are damaged.

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A study on measurement apparatus for ferroelectricity in ferroelectrics (강유전특성 측정장치의 연구개발)

  • Lee, Chang-Hun;Kang, Dae-Ha
    • Proceedings of the KIEE Conference
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    • 1997.07d
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    • pp.1317-1319
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    • 1997
  • This paper is to study and develope a measurement apparatus for ferroelectricity. The apparatus consists of wave generation part, high voltage amplifier part, measurement part, data acquisition part and the related controll circuits. Single or double excitation wave is digitalized and sent to the external RAM of wave generation part by personal computer. These datas saved in the RAM are converted to analog excitation wave through D/A converter. The frequency of excitation wave is depend on the read-out speed of the RAM by clock pulse. Such generated wave is applied to high voltage amplifier as a input voltage. The output of high voltage amplifier is applied to ferroelectrics and the response is obtained from the charge amplifier of measurement part. The response is sampled and converted to digital datas through AID converter. These digital datas are automatically saved in the external RAM of acquisition part. The computer takes the digital datas and calculates the electric displacement D, the electric field and the dielectric constant $\varepsilon$. We tested for PZT ceramic sample and could observed the D-E hysteresis lops and ${\varepsilon}_s$-E hysteresis loops with good forms.

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Development of Ship Vibration Analysis Software PFADS-R3 and Its Applications

  • Hong Suk-Yoon;Seo Seong-Hoon;Park Young-Ho;Lee Ho-Won
    • Journal of Ship and Ocean Technology
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    • v.8 no.4
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    • pp.26-33
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    • 2004
  • PFFEM software, PFADS has been developed for the vibration predictions and analysis of coupled system structures in medium-to-high frequency ranges. PFFEM is numerical method which solves energy governing equation using finite element technique for complicated structures where the exact solutions are not available. Through the upgrades, present PFADS R3 could cover the general beam and plate structures including various kinds of beam-plate rigid joints and other joint systems such as spring-damper junction and rigid bar connection. This software is composed of 3 parts; translator, model converter and solver. The translator makes its own FE-model from bulk data of commercial FE software, and the model converter is used to convert FE-model to PFFE-model automatically. The solver calculates vibrational energy density and intensity for PFFE-model by solving global matrix equations of PFFEM. For the applications of real transportation systems, a container ship model has been examined with respect to major parameters, and reliable results have been obtained.

ADC-Based Backplane Receivers: Motivations, Issues and Future

  • Chung, Hayun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.3
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    • pp.300-311
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    • 2016
  • The analog-to-digital-converter-based (ADC-based) backplane receivers that consist of a front-end ADC followed by a digital equalizer are gaining more popularity in recent years, as they support more sophisticated equalization required for high data rates, scale better with fabrication technology, and are more immune to PVT variations. Unfortunately, designing an ADC-based receiver that meets tight power and performance budgets of high-speed backplane link systems is non-trivial as both front-end ADC and digital equalizer can be power consuming and complex when running at high speed. This paper reviews the state of art designs for the front-end ADC and digital equalizers to suggest implementation choices that can achieve high speed while maintaining low power consumption and complexity. Design-space exploration using system-level models of the ADC-based receiver allows through analysis on the impact of design parameters, providing useful information in optimizing the power and performance of the receiver at the early stage of design. The system-level simulation results with newer device parameters reveal that, although the power consumption of the ADC-based receiver may not comparable to the receivers with analog equalizers yet, they will become more attractive as the fabrication technology continues to scale as power consumption of digital equalizer scales well with process.

Design of a 12-bit 1MSps SAR ADC using 0.18㎛ CMOS Process (0.18㎛ CMOS 공정을 이용한 12-bit 1MSps 연속 근사화 아날로그-디지털 변환기 설계)

  • Seong, Myeong-U;Choi, Seong-Kyu;Kim, Sung-Woo;Kim, Shin-Gon;Lee, Joo-Seob;Oh, Se-Moung;Seo, Min-Soo;Ryu, Jee-Youl
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.365-367
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    • 2013
  • 본 논문에서는 $0.18{\mu}m$ CMOS 공정 기술을 이용하여 12-bit 1MSps 연속 근사화 아날로그-디지털 변환기(Analog to Digital Converter : ADC)를 설계하였다. 설계된 아날로그-디지털 변환기는 Cadence Tool을 이용하여 시뮬레이션 및 레이아웃을 진행하였다. 시뮬레이션 결과 1.8V의 공급전압에서 전력 소모는 5.5mW였고, 입력 신호의 주파수가 100kHz일 때, SNDR은 70.03dB, 유효 비트수는 11.34bit의 결과를 보였다. 설계된 변환기는 $0.8mm{\times}0.7mm$ 크기로 레이아웃 되었다.

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Design of a 25 mW 16 frame/s 10-bit Low Power CMOS Image Sensor for Mobile Appliances

  • Kim, Dae-Yun;Song, Min-Kyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.2
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    • pp.104-110
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    • 2011
  • A CMOS Image Sensor (CIS) mounted on mobile appliances requires low power consumption due to limitations of the battery life cycle. In order to reduce the power consumption of CIS, we propose novel power reduction techniques such as a data flip-flop circuit with leakage current elimination and a low power single slope analog-to-digital (A/D) converter with a sleep-mode comparator. Based on 0.13 ${\mu}m$ CMOS process, the chip satisfies QVGA resolution (320 ${\times}$ 240 pixels) that the cell pitch is 2.25 um and the structure is a 4-Tr active pixel sensor. From the experimental results, the performance of the CIS has a 10-b resolution, the operating speed of the CIS is 16 frame/s, and the power dissipation is 25 mW at a 3.3 V(analog)/1.8 V(digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption was reduced by approximately 22% in the sleep mode, and 20% in the active mode.

PaperMill - A Layered Manufacturing System Using Lamination and Micro Endmill (PaperMill - 박막과 마이크로 엔드밀을 사용한 적층조형 시스템)

  • 배광모;이상욱;이병철;강경수;김형욱;홍영정;진영성;김종철;박정화
    • Korean Journal of Computational Design and Engineering
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    • v.8 no.2
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    • pp.115-121
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    • 2003
  • A new Layered Manufacturing(LM) system, named PaperMill, is developed applying micro milling technology. A micro endmill(127 11m in diameter) is introduced as the cutter of build material. The selected build material for this system is an adhesive-coated paper roll which provides advantages such as good bonding between layers, machinability, and low material cost. A 3-axis CNC controller and three step-motors are used for the movement of X-Y-Z table of the system. For simplicity of the control of mechanism, the control system for feeding the paper roll is uncoupled from CNC controller. Two code converters are developed for the toolpath generation of the new LM system. The NC converter generates a set of NC codes for PaperMill using commercial CAM software while the SML converter generates an NC code from Quickslice's SML format. The NC codes generated from the converters consist of a series of profile data and trigger code for paper feeding. Two sample gears were fabricated to prove the concept of the system, which shown that the dimensional errors of the fabricated gears is under 3.4 percent.