• Title/Summary/Keyword: Data Parallel

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Implementation of All-Optical Serial-Parallel Data Converters Using Mach-Zehnder Interferometers and Applications (MZI를 이용한 전광 직렬-병렬 데이터 형식 변환기 구현과 활용 방안)

  • Lee, Sung Chul
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.7 no.2
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    • pp.59-65
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    • 2011
  • All-optical signal processing is expected to offer advantages in speed and power consumption against over electronics signal processing. It has a potential to solve the bottleneck issues of ultra-high speed communication network nodes. All-optical serial-to-parallel and parallel-to-serial data converters would make it possible to easily process the serial data information of a high-speed optical packet without optical-to-electronic-to-optical data conversion. In this paper, we explain the principle of simple and easily expandable all-optical serial-to-parallel and parallel-to-serial data converters based on Mach-Zehnder interferometers. We experimentally demonstrate these data converters at 10Gbit/s serial data rate. They are useful all-optical devices for the all-optical implementations of label decoding, self-routing, control of variable packets, bit-wise logical operation, and data format conversion.

A Representation for Multithreaded Data-parallel Programs : PCFG(Parallel Control Flow Graph) (다중스레드 데이타 병렬 프로그램의 표현 : PCFG(Parallel Control Flow Graph))

  • 김정환
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.12
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    • pp.655-664
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    • 2002
  • In many data-parallel applications massive parallelism can be easily extracted through data distribution. But it often causes very long communication latency. This paper shows that task parallelism, which is extracted from data-parallel programs, can be exploited to hide such communication latency Unlike the most previous researches over exploitation of task parallelism which has not been considered together with data parallelism, this paper describes exploitation of task parallelism in the context of data parallelism. PCFG(Parallel Control Flow Graph) is proposed to represent a multithreaded program consisting of a few task threads each of which can include a few data-parallel loops. It is also described how a PCFG is constructed from a source data-parallel program through HDG(Hierarchical Dependence Graph) and how the multithreaded program can be constructed from the PCFG.

Parallel Algorithm for Spatial Data Mining Using CUDA

  • Oh, Byoung-Woo
    • Journal of Advanced Information Technology and Convergence
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    • v.9 no.2
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    • pp.89-97
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    • 2019
  • Recently, there is an increasing demand for applications utilizing maps and locations such as autonomous vehicles and location-based services. Since these applications are developed based on spatial data, interest in spatial data processing is increasing and various studies are being conducted. In this paper, I propose a parallel mining algorithm using the CUDA library to efficiently analyze large spatial data. Spatial data includes both geometric (spatial) and non-spatial (aspatial) attributes. The proposed parallel spatial data mining algorithm analyzes both the geometric and non-spatial relationships between two layers. The experiment was performed on graphics cards containing CUDA cores based on TIGER/Line data, which is the actual spatial data for the US census. Experimental results show that the proposed parallel algorithm using CUDA greatly improves spatial data mining performance.

Applications of Parallel Coordinate Plots for Visualizing Gene Expression Data (평행좌표 플롯을 활용한 유전자발현 자료의 시각화)

  • Park, Mi-Ra;Kwak, Il-Youp;Huh, Myung-Hoe
    • The Korean Journal of Applied Statistics
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    • v.21 no.6
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    • pp.911-921
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    • 2008
  • Visualization of the gene expression data on a low-dimensional graph is helpful in uncovering biological information contained in the data. In this study, we focus on two modified versions of the parallel coordinate plot. First one is the ePCP(enhanced parallel coordinate plot) which shows "near smooth" connecting curves between axes spaced proportionately to the proximity of re-ordered variables. Second one is APCP(Andrews' type parallel coordinate plot) which is obtained by rotating Andrews' plot that has a form of the parallel coordinate plot. Visualization procdures using ePCP and APCP are given for the lymphoma data case.

Retrieval of Assembly Model Data Using Parallel Web Services (병렬 웹 서비스를 이용한 조립체 모델 데이터의 획득)

  • Kim, Byung-Chul;Han, Soon-Hung
    • Korean Journal of Computational Design and Engineering
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    • v.13 no.3
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    • pp.217-226
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    • 2008
  • Web Services for CAD (WSC) aims at interoperation with CAD systems based on Web Services. This paper introduces one part of WSC which enables remote users to retrieve assembly model data using Web Services. However, retrieving assembly model data takes long time. To resolve this problem, this paper proposes using parallel Web Services. As assembly models comprise a set of part models, it is easy to separate the problem domain into smaller problems. In addition, Web Services inherently supports distributed computing. This characteristic makes the parallel processing of Web Services easy. Firstly, the implementation of WSC which retrieves assembly model data based parallel Web Services is shown. And then, for the comparison, the experiments on the retrieval of assembly model data based on single Web Services and parallel Web Services are shown.

Design of A 1'${\times}$1', 512${\times}$512 Poly-Si TFT-LCD with Integrated 8-bit Parallel-Serial Digital Data Drivers

  • Shin, Won-Chul;Lee, Seung-Woo;Chung, Hoon-Ju;Han, Chul-Hi
    • Journal of Information Display
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    • v.2 no.2
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    • pp.1-6
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    • 2001
  • A $1"{\times}l"$, $512{\times}512$ poly-Si TFT-LCD with a new integrated 8-bit parallel-serial digital data driver was proposed and designed. For high resolution, the proposed parallel-serial digital driver used serial video data rather than parallel ones. Thus, digital circuits for driving one column line could be integrated within very small width. The parallel-serial digital data driver comprised of shift registers, latches, and serial digital-to-analog converters (DAC's). We designed a $1"{\times}l"$, $512{\times}512$ poly-Si TFT-LCD with integrated 8-bit parallel-serial digital data drivers by a circuit simulator which has physical-based analytical model of poly-Si TFT's. The fabricated shift register well operated at 2 MHz and $V_{DD}$=10V and the fabricated poly-Si TFT serial DAC's, which converts serial digital data to an analog signal, could convert one bit within $2.8{\mu}s$. The driver circuits for one data line occupied $8100{\times}50{\mu}m^2$ with $4{\mu}m$ design rule.

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Regular Polyprism Parallel Coordinate Plot as a Statistical Graphics Tool (통계적 그래픽스 도구로서의 정다각기둥평행좌표그림)

  • Jang, Dae-Heung
    • The Korean Journal of Applied Statistics
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    • v.21 no.4
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    • pp.695-704
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    • 2008
  • The parallel coordinate plot is a graphical data analysis technique for plotting multivariate data. The parallel coordinate plot overcomes the visualization problem of the Cartesian coordinate system for dimensions greater than 4. But, using different ordering of coordinate axes in the parallel coordinate plot of the same data may make different interpretations. Hence, we can use the regular polyprism parallel coordinate plot as an alternative for overcoming the variable arrangement problem of the parallel coordinate plot.

Improvement of the Parallel Importation Logistics Process Using Big Data

  • Park, Doo-Jin;Kim, Woo-Sun
    • Journal of information and communication convergence engineering
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    • v.17 no.4
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    • pp.267-273
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    • 2019
  • South Korea has allowed parallel importation since 1995. Parallel importation causes competition among importers in the logistics process allowing, consumers to purchase foreign brand products at low prices. Most parallel importers base product pricing on subjective judgements. Fashion products in particular, have different sales rates depending on trends and seasons, so sales performance varies greatly depending on selling price timing and policy. The merchandiser (MD) set the price on parallel importation products by aggregating information on imported products and pricing goods. However, this customized process is very time consuming for the MD. This is because the logistics process of parallel importation's customs clearance procedures and repair works is complicated and takes a significant amount of time. In this paper, we propose an improved parallel importation logistics process based on big data, which automatically sets the price of parallel importation products.

Parallelization of Recursive Functions for Recursive Data Structures (재귀적 자료구조에 대한 재귀 함수의 병렬화)

  • An, Jun-Seon;Han, Tae-Suk
    • Journal of KIISE:Software and Applications
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    • v.26 no.12
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    • pp.1542-1552
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    • 1999
  • 자료 병렬성이란 자료 집합의 원소들에 대하여 동일한 작업을 동시에 수행하므로써 얻어지는 병렬성을 말한다. 함수형 언어에서 자료 집합에 대한 반복 수행은 재귀적 자료형에 대한 재귀 함수에 의하여 표현된다. 본 논문에서는 이러한 재귀 함수를 자료 병렬 프로그램으로 변환하기 위한 병렬화 방법을 제시한다. 생성되는 병렬 프로그램의 병렬 수행 구조로는 일반적인 형태의 재귀적 자료형에 대하여 정의되는 다형적인 자료 병렬 연산을 사용하여 트리, 리스트 등과 같은 일반적인 재귀적 자료 집합에 대한 자료 병렬 수행이 가능하도록 하였다. 재귀 함수의 병렬화를 위해서는, 함수를 이루는 각각의 계산들의 병렬성을 재귀 호출에 의해 존재하는 의존성에 기반하여 분류하고, 이에 기반하여 각각의 계산들에 대한 적절한 자료 병렬 연산을 사용하는 병렬 프로그램을 생성하였다.Abstract Data parallelism is obtained by applying the same operations to each element of a data collection. In functional languages, iterative computations on data collections are expressed by recursions on recursive data structures. We propose a parallelization method for data-parallel implementation of such recursive functions. We employ polytypic data-parallel primitives to represent the parallel execution structure of the object programs, which enables data parallel execution with general recursive data structures, such as trees and lists. To transform sequential programs to their parallelized versions, we propose a method to classify the types of parallelism in subexpressions, based on the dependencies of the recursive calls, and generate the data-parallel programs using data-parallel primitives appropriately.

Implementation and Performance Evaluation of Parallel Programming Translator for High Performance Fortran (High Performance Fortran 병렬 프로그래밍 변환기의 구현 및 성능 평가)

  • Kim, Jung-Gwon;Hong, Man-Pyo;Kim, Dong-Gyu
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.4
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    • pp.901-915
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    • 1999
  • Parallel computers are known to be excellent in performance per cost also satisfying scalability and high performance. However parallel machines have enjoyed limited success because of difficulty in parallel programming and non-portability between parallel machines. Recently, researchers have sought to develop data parallel language that provides machine independent programming systems. Data parallel language such as High Performance Fortran provides a basis to write a parallel program based on a global name space by partitioning data and computation, generating message-passing function. In this paper, we describe the Parallel Programming Translator(PPTran), source-to-source data parallel compiler, generating MPI SPMD parallel program from HPF input program through four phases such as data dependence analysis, partitioning data, partitioning computation, and code generation with explicit message-passing and verify the performance of PPTran

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