• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2007.05a
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• pp.448-452
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• 2007

Many industrial operations require continuous or nearly-continuous operation of machines, which if interrupted can result in significant financial loss. The condition monitoring of these machines has received considerable attention recent years. Rapid developments in semiconductor, computing, and communication with a remote site have led to a new generation of sensor called "smart" sensors which are capable of wireless communication with a remote site. The purpose of this research is the development of smart sensor using which can on-line perform condition monitoring. This system is addressed to detect conditions that may lead to equipment failure when it is running. Moreover it will reduce condition monitoring expense using low cost MEMS accelerometer. This sensor can receive data in real-time or periodic time from MEMS accelerometer. Furthermore, this system is capable for signal preprocessing task (High Pass Filter, Low Pass Filter and Gain Amplifier) and analog to digital converter (A/D) which is controlled by CPU. A/D converter that converts 10bit digital data is used. This sensor communicates with a remote site PC using TCP/IP protocols. Wireless LAN contain IEEE 802.11i-PSK or WPA (PSK, TKIP) encryption. Developed sensor executes performance tests for data acquisition accuracy estimations.

• 한국지구물리탐사학회:학술대회논문집
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• 2005.05a
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• pp.187-194
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• 2005

A PC-based 8-channel seismic system has been developed and applied for bedrock mapping in near shore environment. The system is composed of an analog signal processor and an A/D converter installed on the computer, and a streamer with the group interval of 5 meters. The system is accomplished with a data acquisition program which controls the system and a data processing software. With the PC-based shallow marine seismic survey system high-resolution 2-D marine seismic profiles which have high S/N ratios can be obtained after appropriate data processing.

• Journal of IKEEE
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• v.19 no.3
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• pp.371-377
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• 2015

This paper is about the RF transceiver designed and implementation for common data link. The trasmitter is configured as a frequency up-converter, a power amplifier and a duplexer. The receiver is configured as a duplxer, a frequency down-converter and a low noise amplifier. The maximum transmission distance, the reception sensitivity is designed to meet the electrical and temperature characteristics and the like. Using a modeling and simulation in order to meet the requirements of the RF transceiver has been designed and implemented. Transmitting output power and Noise Figure has been measured with 38.58dBm and 5.5dB, respectively. All of the electrical and temperature specifications was meet. Was confirmed all of the requirement specification by electrical characteristics test and temperature characteristics test.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.8B
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• pp.826-833
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• 2002

Generally, it is announced that RZ pattern gives a better transmission performance than NRZ pattern in ultra-high speed transmission above 10Gbps. In this paper, we propose a wavelength converter for RZ data which can controls XPM in SOA by locating polarization controllers within optical fiber loop mirror and demonstrate its performance through simulation and 10Gbps data experiment. The proposed structure needs only one polarization dependent SOA for implementation compared to previous XPM ones to make the cost down. And it provides non-inverted pattern outputs at two output ports respectively.

• Journal of Electrical Engineering and Technology
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• v.6 no.5
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• pp.605-612
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• 2011

As the power grids are integrated into one big umbrella called a "smart grid," communication protocol plays a key role in successful operations. The successful deployment of smart grid interoperability is a major hurdle that must be overcome. The micro grid, a small power system that distributes energy resource, is operated in diverse regions. Different vendors use different communication protocols in the operation of the micro grid. Recently, the IEC 61850 has been legislated to solve the interoperability problems in power utility automation. The present paper presents a micro grid system based on the IEC 61850 protocol. It consists of a micro grid monitoring system, a protocol converter that transforms serial data to IEC 61850 data, and distributed energy resource controllers for diverse DER nodes. A developed communication gateway can be deployed for DER controllers with serial links to exchange data with IEC 61850-based devices. The gateway can be extended to IEC 61850-based distribution automation systems, substation automation systems, or SCADA.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.2
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• pp.16-23
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• 2006

This paper presents a novel single-stage high frequency resonant inverter link type DC-DC converter using zero voltage switching with high power-factor. The proposed topology is integrated half-bridge boost rectifier as power factor corrector(PFC) and half-bridge high frequency resonant converter into a single-stage. The input stage of the half-bridge boost rectifier works in discontinuous conduction mode(DCM) with constant duty cycle and variable switching frequency. So that a boost converter makes the line current follow naturally the sinusoidal line voltage waveform. Simulation results have demonstrated the feasibility of the proposed high frequency resonant converter. Characteristics values based on characteristics analysis through circuit analysis is given as basis data in design procedure. Also, experimental results are presented to verify theoretical discussion. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications, fluorescent lamp and DC-DC converter etc.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.12
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• pp.541-554
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• 1986

This paper presents the results of driving performance analysis of permanent magnet synchronous motor using a microprocessor based control system. The system consists of three phase power transistor inverters, three phase controlled rectifier, three central processing units, and sensors. The three CPUs are, respectively, used to generate PWM control signals for the inverter generating three phase sine wave, to generate the gate control signals for firing the converter, and to supervise other two CPUs. The supervisor is used to compute PI control algtorithm to three phase reference sine wave for the inverter. It is also used to maintain a constant voltage frequency ratio for the converter operating as a constant torque controller. The inverter CPU retrieves precomputed PWM patterns from look up tables because of computation speed limitations found in almost available microprocessors. The converter CPU also retrieves precomputed gate control patterns from another look-up tables. For protecting the control ststem from any damage by extraordinary over currents, the supervisor receives the data from current sensor, CT, and break down the CB to isolate the circuits from source. A resolver has a good performance characteristics of overall speed range, especially on low speed range. Therefor the speed control accuracy is impoved. The microprocessor based PM synchronous motor control system, thus, has many advantages such as constant torque characteristics, improvement of wave, limitation on extraordinary over currents, improvement of speed control accuracy, and fast response speed control using multi-CPU and look-up tables.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.11
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• pp.40-47
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• 2012

Most of existing wind turbine system is used with geared type; however, this type has lots of problems which are noisy, weight, maintenance and so on. In this paper, wind turbine system with fluid torque converter applied to solve these problems. In case of the proposed wind turbine system, it is possible to transmit torque to adaptable distance. So various sets including generator, inverter and auxiliary motor move from the nacelle to the ground. As a result, Total weight in Nacelle can be decreased. however, the efficiency can be decreased with fluid torque system. We also applied auxiliary motor to fluid torque system. So, we also realized rated revolutions and rated output windturbine and could get considerable good data.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.305-308
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• 2002

An 1.8V 6bit IGSPS ADC for high speed data acquisition is discussed in this paper. This ADC is based on a flash ADC architecture because the flash ADC is the only practical architecture at conversion rates of IGSPS and beyond. A straightforward 6bit full flash A/D converter consists of two resistive ladders with 63 laps, 63 comparators and digital blocks. One important source of errors in flash A/D converter is caused by the capacitive feedthrough of the high frequency input signal to the resistive reference-lauder. Consequently. the voltage at each tap of the ladder network can change its nominal DC value. This means large transistors have a large parasitic capacitance. Therefore, a dual resistive ladder with capacitor is employed to fix the DC value. Each resistive ladder generates 32 clean reference voltages which alternates with each other. And a two-stage amplifier is also used to reduce the effect of the capacitive feedthrough by minimizing the size of MOS connected to reference voltage. The proposed ADC is based on 0.18${\mu}{\textrm}{m}$ 1-poly 6-metal n-well CMOS technology, and it consumes 307㎽ at 1.8V power supply.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.11
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• pp.149-156
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• 2012

A digital input class-D audio amplifier is presented for digital hearing aid. The class-D audio amplifier is composed of digital and analog circuits. The analog circuit converts a digital input to a analog audio signal (DAC) with noise suppression in the audio band. An interpolated digital delta-sigma modulator is used to convert data types between digital signal processor (DSP) and digital-to-analog converter (DAC). An 16-bit, 25-kbps pulse code modulated (PCM) input is interpolated to 16-bit, 50-kbps by a digital filter. The output signal of interpolation filter is noise-shaped by a third-order digital sigma-delta modulator (SDM). As a result, 1.5-bit, 3.2-Mbps signal is applied to simple digital to analog converter.