• Title/Summary/Keyword: DVB-S

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A Trend of Domestic and Foreign Cable 3DTV Broadcasting Standardization (국내외 케이블 3DTV 방송서비스 표준화 현황)

  • Yun, K.J.;Jung, J.Y.;Cheong, W.S.;Lee, G.S.
    • Electronics and Telecommunications Trends
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    • v.28 no.6
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    • pp.150-155
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    • 2013
  • 현재 3DTV 방송은 UHDTV(Ultra High Definition Television) 방송과 더불어 차세대 방송기술로써 인식되고 있으며, 한국, 미국, 유럽 등 선진국을 중심으로 다양한 방식의 3DTV 실험방송 및 상용서비스가 활발히 진행되고 있다. 표준화 측면에서는 프레임호환 3DTV에서 서비스호환 3DTV 서비스로 발전되고 있으며, 방송망 및 IP망을 결합한 하이브리드 3DTV 서비스에 대한 표준화가 진행 중에 있다. 이러한 전 세계 표준화 움직임을 토대로, 본고에서는 ITU-T, SCTE, DVB 및 TTA 등 케이블디지털 방송 매체 기반의 3DTV 방송서비스에 대한 국내외 표준화 현황에 대해 살펴본다.

Standardization Trend of Terrestrial Digital Television (지상파 DTV 표준화 동향)

  • Lim, H.S.;Kim, H.M.;Lee, S.I
    • Electronics and Telecommunications Trends
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    • v.25 no.2
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    • pp.1-7
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    • 2010
  • 국내 지상파 DTV 방송 시스템의 국가표준인 북미의 ATSC 표준은 최근 이동 방송을 위한 표준 제정 작업이 1 차 완료된 이후 추가적인 성능 확장을 위한 표준화 작업이 진행중에 있으며, 한편으로는 차세대 방송 서비스를 위한 진화를 준비하고 있다. 본 고에서는 전 세계 지상파 DTV 방송 표준의 가장 큰 두 개의 축을 이루는 ATSC 및 DVB 두 기관에서 진행되고 있는 표준화 동향 중 국내 지상파 DTV 표준이 준용하는 ATSC의 표준화 동향을 정리함으로써 국내 지상파 DTV 방송 기술 및 표준의 개발 방향을 잡는 데 참고가 될 수 있는 정보를 제공하고자 한다.

A Trend of Domestic and Foreign Service-compatible 3DTV Broadcasting Standardization (국내외 서비스 호환 3DTV 방송 표준화 현황)

  • Yun, K.J.;Lee, J.Y.;Lee, B.H.;You, W.S.;Jung, J.Y.;Cheong, W.S.
    • Electronics and Telecommunications Trends
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    • v.27 no.4
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    • pp.107-113
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    • 2012
  • 현재 3DTV 방송은 한국, 미국, 유럽 등 선진국을 중심으로 다양한 방식의 3DTV 실험방송 및 상용 서비스가 활발히 진행되고 있다. 3DTV 방송 방식은 기술개발 진행 측면에서 i) 서비스 호환 방식 지원, ii) 기존 디지털방송 화질 및 최대 1080i 고해상도 지원이라는 핵심 기술개발을 목표로 점차 진화되고 있으며 전 세계 표준단체는 이를 지원하기 위한 서비스 호환 3DTV 방송 서비스에 대한 표준화가 본격적으로 진행 중에 있다. 본고에서는 ATSC(Advanced Television Systems Committee), DVB(Digital Video Broadcasting), SCTE(Society of Cable Telecommunications Engineers) 및 TTA(Telecommunications Technology Association) 등 다양한 디지털방송 매체 기반의 서비스 호환 3DTV 방송 방식에 대한 국내외 표준화 현황에 대해 살펴본다.

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Post Production in a Multi-format Environment

  • Pank, R. A.
    • Broadcasting and Media Magazine
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    • v.4 no.4
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    • pp.46-51
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    • 1999
  • The introduction of broadcast digital television (DTV) was, at one time, seen as an opportunity to rationalise video formats. The reality is quite different with a rapid divergence as the united States' ATSC offers 18 formats to cover both standard definition (SD) and high definition (HD), and yet more are supported by Europe's DVB. At the same time multi-media is expanding both as an area for source material and for finished work. Post production needs to move away from single-format facilities as requirements for multi-format operation is already increasing. A 'format-independent' solution is described which allows efficient operation with any mix of input formats and able to output any format with high quality. Attention is given to retaining the speed, accuracy and immediacy which is a feature of today's professional facilities -even while handling the greater demands of HD. Another route, using 24 frames-per-second is also examined.

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Wideband CMOS Voltage-Controlled Oscillator(VCO) for Multi-mode Vehicular Terminal (융복합 차량 수신기를 위한 광대역 전압제어 발진기)

  • Choi, Hyun-Seok;Diep, Bui Quag;Kang, So-Young;Jang, Joo-Young;Bang, Jai-Hoon;Oh, Inn-Yul;Park, Chul-Soon
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.7 no.6
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    • pp.63-69
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    • 2008
  • Reconfigurable RF one-chip solutions have been researched with the objective of designing for smaller-sized and more economical RF transceiver and it can be applied to a vehicular wireless terminal. The proposed voltage-controlled oscillator satisfies the targeted frequency range ($4.2{\sim}5.4\;GHz$) and the frequency planning which correspond to the standards such as CDMA(IS-95), PCS, GSM850, EGSM, WCDMA, WLAN, Bluetooth, WiBro, S-DMB, DSRC, GPS, and DVB-H/DMB-H/L(L Band). In order to improve phase noise performance, PMOS is adopted in the cross-coupled pair, the tail current source and MOS varactor in this VCO and differential-typed switching is proposed in capacitor array. Based on the measurement results, a total power dissipation is $5.3{\sim}6.0\;mW$ at 1.8 V power supply voltage. The oscillator is tuned from 4.05 to 5.62 GHz; The tuning range is 33%. The phase noise is -117.16 dBc/Hz at 1 MHz offset frequency and the FOM (Figure Of Merit) is $-180.84{\sim}-180.5$.

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Complexity-Reduced Algorithms for LDPC Decoder for DVB-S2 Systems

  • Choi, Eun-A;Jung, Ji-Won;Kim, Nae-Soo;Oh, Deock-Gil
    • ETRI Journal
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    • v.27 no.5
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    • pp.639-642
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    • 2005
  • This paper proposes two kinds of complexity-reduced algorithms for a low density parity check (LDPC) decoder. First, sequential decoding using a partial group is proposed. It has the same hardware complexity and requires a fewer number of iterations with little performance loss. The amount of performance loss can be determined by the designer, based on a tradeoff with the desired reduction in complexity. Second, an early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Once the edges are detected, no further iteration is required; thus early detection reduces the computational complexity.

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Studies on Layered Modulation for SVC Signals in DVB-S2 System

  • Wang, Yi;Kim, Seung-Chul;Lee, Kye-San;Sohn, Won
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2008.11a
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    • pp.181-184
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    • 2008
  • The paper describes a Layered Modulation using the SVC signals and studies the properties of the modulation with respect to several parameters by the computer simulation. The SVC signals will include a base layer signal and an enhancement signal, and the base layer signal is the more important one in its channel robustness. The parameters will include a carrier frequency, a bandwidth, power level, modulation type and code rate. We analyze the demodulating and decoding process of the Layered Modulation system through several scatter plots. And then we discuss the affect of the layer signal power difference to the BER performance, which also proves the base layer signal is more important than the enhancement layer signal.

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Efficient Spectrum Sensing Method using the Short Time Fourier Transform algorithm (Short Time Fourier Transform 알고리즘을 적용한 효율적인 스펙트럼 센싱 기법)

  • Kang, Min-Kyu;Lee, Hyun-So;Hwang, Sung-Ho;Kim, Kyung-Seok
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.11a
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    • pp.375-378
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    • 2009
  • The Spectrum Sensing Technology is the core technology of the Cognitive Radio (CR) System that is one of the future wireless communication technologies. This is the technology that temporarily allocates the frequency bandwidth by scanning surrounding wireless environments to keep licensed terminals and search the unused frequency bandwidth. In this paper, we proposed the efficient Spectrum Sensing Method using the Short Time Fourier Transform (STFT). The Cosine and DVB-H signal with the 6MHz bandwidth is used as the Input Signal. And we confirm the Spectrum Sensing result using Modified Periodogram Method, Welch's Method for compared with Short Time Fourier Transform Algorithm.

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Adaptive Coding and Modulation Scheme for Ka Band Space Communications

  • Lee, Jae-Yoon;Yoon, Dong-Weon;Lee, Woo-Ju
    • Journal of Astronomy and Space Sciences
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    • v.27 no.2
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    • pp.129-134
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    • 2010
  • Rain attenuation can cause a serious problem that an availability of space communication link on Ka band becomes low. To reduce the effect of rain attenuation on the error performance of space communications in Ka band, an adaptive coding and modulation (ACM) scheme is required. In this paper, to achieve a reliable telemetry data transmission, we propose an adaptive coding and modulation level using turbo code recommended by the consultative committee for space data systems (CCSDS) and various modulation methods (QPSK, 8PSK, 4+12 APSK, and 4+12+16 APSK) adopted in the digital video broadcasting-satellite2 (DVB-S2).

A Design of 8192-point FFT Processor using a new CBFP Scaling Method (새로운 CBFP 스케일링 방법을 적용한 8192점 FFT프로세서 설계)

  • 이승기;양대성;박광호;신경욱
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.113-116
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    • 2002
  • This paper describes a design of 8192-Point pipelined FFT/IFFT processor (PFFTSk) core for DVB-T and DMT-based VBSL modems. A novel two-step convergent block floating -point (75_CBFP) scaling method is proposed to improve the signal- to-quantization-noise ratio (SeNR) of FFT/IFFT results. Our approach reduces about 80% of memory when compared with conventional CBFP methods. The PFFTSk core, which is designed in VHDL and synthesized using 0.25-${\mu}{\textrm}{m}$ CMOS library, has about 76,300 gates, 390k bits RAM, and Twiddle factor ROM of 39k bits. Simulation results show that it can safely operate up to 50-MHz clock frequency at 2.5-V supply, resulting that a 8192-point FFT/IFFT can be computed every 164-$mutextrm{s}$. The SQNR of about 60-dB is achieved.

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