• KIEE International Transactions on Power Engineering
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• 제5A권3호
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• pp.214-220
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• 2005

In order to improve energy efficiency and solve power disturbances, power components measurement for both the supply and demand side of a power system must be implemented before appropriate action on the power problems can be taken. This paper presents a DSP (Digital Signal Processor)-based multi-channel (voltage 8-channel and current 10-channel) power measurement system that can simultaneously measure and analyze power components for both supply and demand. Voltage 8-channel and current 10-channel measurement is made through voltage and current sensors connected to the developed system, and power components such as reactive power, power factor and harmonics are calculated and measured by the DSP. The measured data are stored in a personal computer (PC) and a commercial program is then used for measurement data analysis and display. After voltage and current measurement accuracy revision using YOKOGAWA 2558, the developed system was tested using a programmable ac power source. The test results showed the accuracy of the developed system to be about 0.3 percent. Also, a simultaneous measurement field test of the developed system was implemented by application to the supply and demand side of the three-phase power system.

• 전력전자학회논문지
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• 제11권3호
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• pp.233-238
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• 2006

전력 외란을 해결하기 위해서는 전력 계통의 전원 측과 부하 측 양단에서 전력 성분의 측정이 요구된다. 본 논문은 전원 측과 부하 측 양단에서 동시에 전력 성분을 측정하고 분석할 수 있는 DSP(디지털 신호 처리 장치) 기반의 다채널(전압 8채널, 전류 10채널) 전력 성분 측정 시스템을 제안하였다. 개발된 시스템은 YOKOGAWA 2558을 이용하여 전압과 전류를 보정한 후, 전력 계통 현장에서 실험하였다.

• Journal of Power Electronics
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• 제9권3호
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• pp.410-417
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• 2009

This paper represents a design and implementation of a digital controller for a multi-phase synchronous buck converter (SBC) using a digital signal processor (DSP). The multi-phase SBC has generally been used for a voltage regulation module (VRM) of a microprocessor because of its high current handling capability at a low output voltage. The VRM requires high control performance of tight output regulation, high slew rate, and load sharing capability of multiple converters. In order to achieve these requirements, the design and implementation of a digital control system for a multi-phase SBC are presented in this paper. The digital PWM generation, current sensing, and voltage and current controller using a DSP TMS320F2812 are considered. The experimental results are provided to show the validity of the implemented digital control system.

• Journal of Mechanical Science and Technology
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• 제19권6호
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• pp.1243-1252
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• 2005

This paper describes a new digital signal processor (DSP) imbalance measurement system dedicated to real-time vibration analysis on rotating machine. To accomplish real-time analysis, the vibration signals are on-line acquired and processed to analyze the mass imbalance and phase position. This is achieved through the use of FFT and Lissajous diagram. The method followed to analyze the mass imbalance with the chosen hardware and software solutions are described in detail in this paper. Several experimental tests demonstrate the efficiency and accuracy in imbalance analysis performance of the DSP system.

• Journal of Power Electronics
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• 제14권1호
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• pp.74-81
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• 2014

In this study, a brain emotional learning-based intelligent controller (BELBIC) is developed for the speed control of an interior permanent magnet synchronous motor (IPMSM). A novel and simple model of the IPMSM drive structure is established with the intelligent control system, which controls motor speed accurately without the use of any conventional PI controllers and is independent of motor parameters. This study is conducted in both real time and simulation with a new control plant for a laboratory 3 ph, 3.8 Nm IPMSM digital signal processor (DSP)-based drive system. This DSP-based drive system is then compared with conventional BELBIC and an optimized conventional PI controller. Results show that the proposed method performs better than the other controllers and exhibits excellent control characteristics, such as fast response, simple implementation, and robustness with respect to disturbances and manufacturing imperfections.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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• pp.1956-1959
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• 2003

본 논문에서는 HDTV(High Definition TV) 방송수신을 위한 DSP(Digital Signal Processor)기반의 HD급 비디오/오디오 디코더 시스템을 개발하고 그 성능을 확인하였다. DSP 플랫폼은 TI(Texas Instrument)사의 TMS320C6415를 대상으로 하였으며 TI의 DSP RTOS인 DSP/ BIOS를 이용하여 방송스트림인 TS(Transport Stream)을 분리하기 위한 TS Demuxer, MPEG-2 비디오 디코더 및 AC-3 오디오디코더 알고리즘을 통합하였으며, 각각의 알고리즘은 대상 DSP플랫폼인 TMS320C64x에 맞게 고정소수점 구조화 및 최적화를 실시하였다. 테스트를 위한 시스템은 스트리밍을 위한 호스트 PC와 PCI(Peripheral Component Interconnect)버스를 통해 연결된 DSP보드로 구성하였으며 실제 HDTV당송용 스트림과 SD(Standard Definition)급 스트림을 이용하여 성능을 확인하였다.

• 대한임베디드공학회논문지
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• 제18권1호
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• pp.25-30
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• 2023

We propose a method to update DSP (Digital Signal Processor) firmware using USB (Universal Serial Bus) flash drives. The DSP automatically detects USB drives based on an interrupt when the USB drive is inserted into the USB port. The new firmware binary file is found in the mounted USB drive, and the destination address of DSP flash memory is identified for the firmware update writing by investigating the firmware file header. After the new firmware is written to the DSP flash memory, the DSP is reset and rebooted with the newly updated firmware. By employing TI's TMS320F28379D control card with USB ports, we conduct experiments and verify the normal operation of the implemented method.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 추계학술대회 논문집 학회본부 A
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• pp.174-176
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• 2000

In this paper, a high speed distance relay, using a digital signal processor(DSP) is presented. The idea of the protective algorithm is based on the least square method using minimum data window to minimize the relay operating time. A new disign concept for a low-pass filter is proposed. This analog low pass filter has minimum transient response time. The main processor of the relay is TMS320C31. According to a series of real time tests, the proposed protective relay shows reliable and fast operating characteristics.

• 전자공학회논문지C
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• 제36C권9호
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• pp.1-12
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• 1999

본 논문에서는 GMS30C2132마이크로프로세서에 DSP연산을 위하여 128K bytes EPROM과 4K bytes SRAM을 내장하고, 이 과정에서 내/외부 메모리 인터페이스 부분이 프로세서와 1싸이클 엑세스가 이루어지도록 버스 제어 인터페이스 구조를 설계하였다. 내장된 128Kbytes EPROM은 메모리 구조 및 데이터 정렬에 따른 동작을 위해 새로운 데이터 확장 인터페이스 구조와 테스트를 위한 인터페이스 구조를 제안하였으며, 내장된 4K bytes SRAM은 프로세서와 인터페이스를 할 때 DSP 고속 연산에 활용하기 위해 메모리 스택으로써의 이용과 명령어 캐쉬와의 인터페이스, 가변 데이타 크기 제어, 모듈로 4Kb의 어드레싱이 가능한 구조를 채택하여 설계하였다. 본 논문의 새로운 구조 적용으로 내장EPROM, SRAM에서 평균 메모리 엑세스 속도가 종전의 40ns에서 20ns로 감소하였고, 가변 데이타 버스 인터페이스 제어로 프로그램 처리 속도가 2배로 개선되었다.

• 정보통신설비학회논문지
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• 제5권1호
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• pp.25-36
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• 2006

This paper discusses the implementation and performance evaluation of a DSP-based digital beamformer using the Texas Instrument TMSC6711 DSP processor for smart antenna applications. Two adaptive beamforming algorithms which served as the brain for the beamformer, the Normalized Least-Mean-Square (NLMS) and the Constant Modulus Algorithms (CMA) were embedded into the processor and evaluated. Result shows that the NLMS-based digital beamformer outperforms the CMA-based digital beamformer: 1)For NLMS algorithm, the antenna steers to the direction of the desired user even at low iteration value and the suppression level towards the interferer increases as the number of iteration increase. For CMA algorithm, the beam radiation pattern slowly steers to the desired user as the number of iteration increased, but at arate slower than NLMS algorithm and the sidelobe level is shown to increases as the number of iteration increase. 2) The NLMS algorithm has faster convergence than CMA algorithm and the error convergence for CMA algorithm sometimes is subject to misadjustment.