• Title/Summary/Keyword: DSP processor

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FPGA Modem Platform Design for eHSPA and Its Regularized Verification Methodology (eHSPA 규격을 만족하는 FPGA모뎀 플랫폼 설계 및 검증기법)

  • Kwon, Hyun-Il;Kim, Kyung-Ho;Lee, Chung-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.24-30
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    • 2009
  • In this paper, the FPGA modem platform complying with 3GPP Release 7 eHSPA specifications and its regularized verification flow are proposed. The FFGA platform consists of modem board supporting physical layer requirements, MCU and DSP core embedded control board to drive the modem board, and peripheral boards for RF interfacing and various equipment interfaces. On the other hand, the proposed verification flow has been regularized into three categories according to the correlation degrees of hardware-software inter-operation, such as simple function test, scenario test call processing and system-level performance test. When it comes to real implementations, the emulation verification strategy for low power mobile SoC is also introduced.

Score Arbitration Scheme For Decrease of Bus Latency And System Performance Improvement (버스 레이턴시 감소와 시스템 성능 향상을 위한 스코어 중재 방식)

  • Lee, Kook-Pyo;Yoon, Yung-Sup
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.38-44
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    • 2009
  • Bus system consists of several masters, slaves, arbiter and decoder in a bus. Master means the processor that performs data command like CPU, DMA, DSP and slave means the memory that responds the data command like SRAM, SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method bus system performance can be charged definitely. Fixed priority and round-robin are used in general arbitration method and TDMA and Lottery bus methods are proposed currently as the improved arbitration schemes. In this stuff, we proposed the score arbitration method and composed TLM algorithm. Also we analyze the performance compared with general arbitration methods through simulation. In the future, bus arbitration policy will be developed with the basis of the score arbitration method and improve the performance of bus system.

A Study on the Voice Dialing using HMM and Post Processing of the Connected Digits (HMM과 연결 숫자음의 후처리를 이용한 음성 다이얼링에 관한 연구)

  • Yang, Jin-Woo;Kim, Soon-Hyob
    • The Journal of the Acoustical Society of Korea
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    • v.14 no.5
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    • pp.74-82
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    • 1995
  • This paper is study on the voice dialing using HMM and post processing of the connected digits. HMM algorithm is widely used in the speech recognition with a good result. But, the maximum likelihood estimation of HMM(Hidden Markov Model) training in the speech recognition does not lead to values which maximize recognition rate. To solve the problem, we applied the post processing to segmental K-means procedure are in the recognition experiment. Korea connected digits are influenced by the prolongation more than English connected digits. To decrease the segmentation error in the level building algorithm some word models which can be produced by the prolongation are added. Some rules for the added models are applied to the recognition result and it is updated. The recognition system was implemented with DSP board having a TMS320C30 processor and IBM PC. The reference patterns were made by 3 male speakers in the noisy laboratory. The recognition experiment was performed for 21 sort of telephone number, 252 data. The recognition rate was $6\%$ in the speaker dependent, and $80.5\%$ in the speaker independent recognition test.

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The Flexible Design Architecture for a Continuous Packet Connectivity Protocol on High Speed Packet Access Platform (고속 패킷 접속 규격 플랫폼 기반 연속적인 패킷 연결 프로토콜의 유연한 구조 설계)

  • Kwon, Hyun-Il;Kim, Kyung-Ho;Lee, Chung-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.12
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    • pp.30-35
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    • 2009
  • In this paper, we propose the flexible design architecture for a continuous packet connectivity (CPC) Protocol among additional features of 3GPP HSPA+. In order to meet a practical intellectual property (IP) reuse and the developing time reduction design goals, we utterly take a CPC protocol into account to be realized by reusing digital signal processor (DSP) IP of the proven high speed packet access (HSPA) platform with the minimum hardware modification and addition. Based on the Teak series DSP, the proposed CPC protocol is divided into discontinuous transmit and receive mode, CPC manager, and interface with the proven HSPA platform. According to the regularized verification flow for wireless cellular communication applications, the proposed CPC protocol has been verified in various test scenarios.

Real Time Abandoned and Removed Objects Detection System (실시간 방치 및 제거 객체 검출 시스템)

  • Jeong, Cheol-Jun;Ahn, Tae-Ki;Park, Jong-Hwa;Park, Goo-Man
    • Journal of Broadcast Engineering
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    • v.16 no.3
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    • pp.462-470
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    • 2011
  • We proposed a realtime object tracking system that detects the abandoned or disappeared objects. Because these events are caused by human, we used the tracking based algorithm. After the background subtraction by Gaussian mixture model, the shadow removal is applied for accurate object detection. The static object is classified as either of abandoned objects or disappeared object. We assigned monitoring time to the static object to overcome a situation that it is being overlapped by other object. We obtained more accurate detection by using region growing method. We implemented our algorithm by DSP processor and obtained an excellent result throughout the experiment.

Implementation of Optimizing Compiler for Bus-based VLIW Processors (버스기반의 VLIW형 프로세서를 위한 최적화 컴파일러 구현)

  • Hong, Seung-Pyo;Moon, Soo-Mook
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.4
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    • pp.401-407
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    • 2000
  • Modern microprocessors exploit instruction-level parallel processing to increase the performance. Especially VLIW processors supported by the parallelizing compiler are used more and more in specific applications such as high-end DSP and graphic processing. Bus-based VLIW architecture was proposed for these specific applications and it was designed to reduce the overhead of forwarding unit and the instruction width. In this paper, a optimizing scheduling compiler developed for the proposed bus-based VLIW processor is introduced. First, the method to model interconnections between buses and resource usage patterns is described. Then, on the basis of the modeling, machine-dependent optimization techniques such as bus-to-register promotion, copy coalescing and operand substitution were implemented. Optimization techniques for general-purpose VLIW microprocessors such as selective scheduling and enhanced pipelining scheduling(EPS) were also implemented. The experiment result shows about 20% performance gain for multimedia application benchmarks.

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Design of Dual Fuzzy Logic Controller using $e-{\Delta}e$ Phase Plane for Hydraulic Servo Motor (유압 서보 모터를 위한 $e-{\Delta}e$ 위상평면을 이용한 이중 퍼지 로직 제어기 설계)

  • Shin, Wee-Jae;Moon, Jeong-Hoon
    • Journal of the Institute of Convergence Signal Processing
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    • v.8 no.3
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    • pp.222-226
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    • 2007
  • In this paper we composed the dual fuzzy rules using each region of specific points and $e-{\Delta}e$ phase plane In order to make dual fuzzy rule base. We composed the fuzzy control rules which can decrease rise time, delay time, maximum overshoot than basic fuzzy control rules. proposed method is alternately use at specific points of $e-{\Delta}e$ phase plane with two fuzzy control rules that is one control rule occruing the steady state error in transient region and another fuzzy control rule use to decrease the steady state error and rapidly converge at the convergence region. Also, two fuzzy control rules in the $e-{\Delta}e$ phase plane decide the change time according to response characteristics of plants. In order to confirm thef proposed algorithm. As the results of experiments through the hydraulic servo motor control system with a DSP processor, We verified that proposed dual fuzzy control rules get the good response compare with the basic fuzzy control rule.

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A Theory of the Geological Magnetic Filter for the Improvement of the Signal to Noise Ratio of the Magnetic Detection System (자기 이상검출 시스템의 신호 대 잡음비 개선을 위한 자기환경 필터 이론)

  • Kim, Won-Ho;Kim, Eun-Ro;Yang, Chang-Sub;Choi, In-Kyu;Choi, Jun-Rim;Park, Jong-Sik
    • Journal of Sensor Science and Technology
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    • v.6 no.6
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    • pp.458-465
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    • 1997
  • In this paper, a theory of the geological magnetic filter for the improvements of the signal to noise ratio of the magnetic detection system has been developed. The geological magnetic filter takes two sequences of magnetic fields measured from the reference sensor and the detector sensor and calculate the correlations between them in the frequency domain. Using the filter, we can remove the coherent noises in the time domain and improve the signal to noise ratio of the magnetic detection system. With the recent developments of the DSP hardware technology the geological magnetic filter can be easily implemented using the digital signal processor. We show the ability of the geological magnetic filter under various circumstances through computer simulations. Numerical simulation results show that geological magnetic filter can excellently remove the sensor misalignment effects and the regular short range local noise as well as it delete the coherent noises.

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Scleral Diagnostic System Implementation with Color and Blood Vessel Sign Pattern Code Generations (컬러와 혈관징후패턴 코드 생성에 의한 공막진단시스템 구현)

  • Ryu, Kwang Ryol
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.12
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    • pp.3029-3034
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    • 2014
  • The paper describes the scleral diagnostic system implementation for human eyes by using the scleral color code and vessels sign pattern code generations. The system is based on the high performance DSP image signal processor, programmable gain control for preprocessing and RISC SD frames storage. RGB image signals are optimized by PGC, the edge image is detected form the gray image converted. The processing algorithms are executed by scleral color code generation and scleral vessels sign pattern code creation for discriminating and matching. The scleral symptomatic color code is generated by YCbCr values at memory map tolerated and the vessel sign pattern code is created by digitizing the 24 clock and 13 ring zones, overlay matching and tolerances. The experimental results for performance are that the system runs 40ms, and the color and pattern for diagnostic errors are around 20% and 24% on average. The system and technique enable a scleral diagnosis with subdividing the patterns and patient database.

Design and Implementation of Recurrent Time Delayed Neural Network Controller Using Fuzzy Compensator (퍼지 보상기를 사용한 리커런트 시간지연 신경망 제어기 설계 및 구현)

  • Lee, Sang-Yun;Shin, Woo-Jae
    • Journal of the Korean Institute of Intelligent Systems
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    • v.13 no.3
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    • pp.334-341
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    • 2003
  • In this paper, we proposed a recurrent time delayed neural network(RTDNN) controller which compensate a output of neural network controller. Even if learn by neural network controller, it can occur an bad results from disturbance or load variations. So in order to adjust above case, we used the fuzzy compensator to get an expected results. And the weight of main neural network can be changed with the result of learning a inverse model neural network of plant, so a expected dynamic characteristics of plant can be got. As the results of simulation through the second order plant, we confirmed that the proposed recurrent time delayed neural network controller get a good response compare with a time delayed neural network(TDU) controller. We implemented the controller using the DSP processor and applied in a hydraulic servo system. And then we observed an experimental results.