• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 A
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• pp.595-602
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• 1994

PERISTOR-3000 loaded with 32 bit DSP(Digital Signal Processor) is a technically advanced versatile dc motor controller in applications with very high requirements for rapid response, control accuracy and reliability. The current controller of PERISTOR-3000 is of the predictive type and gives fast control with both discontinuous and continuous current compared to the conventional PI current control. The speed controller gain is compensated to improve response behavior. PERISTOR-3000 communicates with its host computer, POSTAR-3200, or any IBM or compatible PC and can be controlled. Dedicated monitoring system for MMI is introduced.

• 한국조명전기설비학회지:조명전기설비
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• 제9권6호
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• pp.41-48
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• 1995

본 연구에서는 Extended Kalman Filter(EKF)를 이용한 속도센서없는 우도전동기의 벡터제어의 구현을 제안하였다. 또한 회전자 저항의 변동을 보상 할 수 있도록 회전자 저항도 추정한다. 이산화된 유도전동기의 모델을 통해 유도 전동기의 속도와 회전자 저항을 포함한 상태 변수를 정의하고 벡터 제어에 필요한 자속각을 추정하여 노이즈 환경에 놓인 시스템의 동작 특성을 안정되게 하였다. EKF알고리즘의 연산을 위하여 DSP를 이용하고, 전류제어 장치로 공간 전압벡터 변조 방식의 적용이 용이한 마이크로 콘트롤러를 체용하고, 인버터는 IPM(Intelligent Power Module)으로 실험 장치를 구성하였다. 시뮬레이션과 실험을 통하여 속도 추정 특성과 회전자 저항 특성을 살펴본 결과, 본 논문의 EFK 알고리즘이 속도 센서없는 유도전동기 벡터제어에 적합함을 입증할 수 있었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전력기술부문
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• pp.6-8
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• 2006

변전소 자동화 시스템에서 IED(Intelligent Electronic Device)들 간의 효과적인 통신을 위해 표준프로토콜인 IEC-61850이 제시되면서 이를 구현하고 응용하기 위한 관심이 높아지고 있다. 본 논문은 IEC-61850 표준규격을 분석하여 제시된, 거리 계전 IED 모델을 이용해 송전선 보호 IED를 구현하였다. 통신기능 구현은 리눅스 커널 2.6 기반의 통신보드를 사용하였고 계전 알고리즘의 수행은 TMS320C32 기반의 DSP(Digital Signal Processor) 보드를 사용하였다. 보드간 통신은 CAN(Cont roller Area Network) 통신으로 이루어 졌으며 사례연구를 위해 RTDS(Real Time Digital Power System Simulator)를 이용하여 입력신호를 생성하였다. 구성된 시스템의 검증을 위해 거리계전기에서 후비보호 시 발생할 수 있는 문제점을 시뮬레이션 하였다.

• 전력전자학회논문지
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• 제25권4호
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• pp.269-278
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• 2020

In this paper, two types of DC/DC converters in a hydrogen fuel cell hybrid railway vehicle system, which serve to charge high-voltage battery and supply power to an inverter for driving a driving motor, were compared and analyzed. A two-level interleaving boost converter and a three-level boost converter were compared and analyzed, and a theoretical design method was proposed to have an efficiency characteristic of over 95%. In addition, a digital controller design method considering the digital phase delay component of DSP (TMS320F28335) is presented. Finally, the validity of the theoretical design of the converter with 20kW power was verified through static and dynamic experiments respectively.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.356-361
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• 2005

In this paper, a new scheme of current programmed control for three phase PWM AC-AC converter is presented. Compared to duty-ratio voltage control, current programmed control has several advantages such as reduction of system order and inherent current protection. By considering only the magnitude components, the same scheme in the DC-DC converter can be extended to the three phase PWM AC-AC converter. Sensing the output voltage and the inductor current, an error signal will be generated by comparing the output voltage magnitude with a reference value. Then the error signal will be processed by a PI compensator to generate the current command. The converter switches will the change the state by a periodic clock pulse or at the instants when the inductor current magnitude reaches the current command. As an example case, the buck converter is treated. The converter analysis is carried out by applying the complex DQ circuit transformation to obtain basic physical insight into the converter operation and to establish some important characteristic equations for control purpose. The simulation with Simplorer shows the validity of the proposed scheme and the experimental results support the verification of the design.

• 전자공학회논문지S
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• 제34S권1호
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• pp.124-131
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• 1997

There have been many demands for th ereal-time image compression. The image compression systems have a wide range of applications. However, real-time encoding is hard to implement because it needs a large amount of computations. In particular, the discrete cosine transform (DCT) and motion estimatio require a large number of arithmetic oeprations compared to other algorithms in MPEG-2. The conventional fasdt DCT algorithms have focused on the reduction of the number of additions more cycles and more expense in realization. Because TMS320C80 has special structure, new approach for implementation of DCT is suggested. The selection of adaptive algorithm and optimization is requried TMS320C80 are analyzed an dsome adaptive DCT algorithms are selected. The DCT algorithms are optimized and implemented. Chens and lees DCT algorithms among various fast algorithms are selected because 1-D approach is effective in the view of th einternal structure of TMS320C80. According to the simulation result, Lees algorithm is more effective in speed and has little difference in precision. On the basis of the result, the possibility of DCT implementation for real-time MPEG-2 system is verified and the required number of the processor, called advanced DSP, is decided for real-time MPEG-2 encoding and decoding.

• 전력전자학회논문지
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• 제8권3호
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• pp.239-246
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• 2003

BLDC 전동기는 높은 효율과 출력밀도로 인하여, 현재 산업응용 분야에 널리 적용되고 있으며, 특히 고성능 제어 특성과 저소음 운전특성으로 인하여 가정용 전자제품의 활용도가 높아지고 있다. 본 논문에서는 제한적인 설계조건에서 요구성능을 만족하는 트레드 밀 구동용 BLDC 전동기를 설계하고, 이에 적합한 제어기를 제작하였다. 전동기설계에서 제한된 고정자 구조에 대하여, 제작의 용이성과 경제성을 고려하여 CAD와 FEM 해석을 통하여 영구자석의 형상을 설계하였다. 설계된 제어기는 트레드 밀의 안정된 구동과 성능을 위하여 운전자의 무게와 회전속도에 따라 학습된 제어기의 이득이 사용되도록 제작되었다. 제시된 트레드 밀 구동용 BLDCM과 제어기는 실험을 통하여 성능을 확인하였다.

• Journal of Power Electronics
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• 제13권5호
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• pp.877-883
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• 2013

This paper discussed a transformer-less shunt static synchronous compensator (STATCOM) with consideration of the following aspects: fast compensation of the reactive power, harmonic cancelation and reducing the unbalancing of the 3-phase source side currents. The STATCOM control algorithm is based on the theory of instantaneous reactive power (P-Q theory). A self charging technique is proposed to regulate the dc capacitor voltage at a desired level with the use of a PI controller. In order to regulate the DC link voltage, an off-line Genetic Algorithm (GA) is used to tune the coefficients of the PI controller. This algorithm arranged these coefficients while considering the importance of three factors in the DC link voltage response: overshoot, settling time and rising time. For this investigation, the entire system including the STATCOM, network, harmonics and unbalancing load are simulated in MATLAB/SIMULINK. After that, a 35KVA STATCOM laboratory setup test including two parallel converter modules is designed and the control algorithm is executed on a TMS320F2812 controller platform.

• 전자공학회논문지 IE
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• 제47권4호
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• pp.34-38
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• 2010

본 논문에서 DCU는 기지국 전력증폭기의 성능을 안정적으로 유지하여 기지국 전체의 성능과 안정성 유지에 기여한다. 제안된 DCU는 전력증폭기에 공급되는 전력을 제어하며 실험에 사용한 앰프는 정격 입력이 10dBm일 때 정격 출력은 47.8dBm 이다. 성능의 비교는 DCU를 적용 했을 때와 미적용 했을 때를 비교하였고 연구결과 DCU가 IMD의 열화 경계에서 안정적으로 잘 동작 하였으며 전력증폭기가 매우 안정적으로 동작했다. DCU 없이 입력을 정격 보다 2dB 올렸을 때 IMD는 3~4dB 정도 나빠짐을 볼 수 있었다. 측정 결과를 보면 DSP를 이용한 제어가 유효하다는 것을 입증한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1296-1299
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• 2002

We implemented a CD signal processor operated on a CAV 48-speed CD-ROM drive into a VLSI. The CD signal processor is a mixed mode monolithic IC including servo-processor, data recovery, data-processor, and I-bit DAC. For servo signal processing, we included a DSP core, while, for CAV mode playback, we adopted a PLL with a wide recovery range. Data processor (DP) was designed to meet the yellow book specification.［2］So, the DP block consists of EFM demodulator, C1/C2 ECC block, audio processor and a block transferring data to an ATAPI chip. A modified Euclid's algorithm was used as a key equation solver for the ECC block To achieve the high-speed decoding, the RS decoder is operated by a pipelined method. Audio playability is increased by playing a CD-DA disc at the speed of 12X or 16X. For this, subcode sync and data are processed in the same way as main data processing. The overall performance of IC is verified by measuring a transfer rate from the innermost area of disc to the outermost area. At 48-speed, the operating frequency is 210 ㎒, and this chip is fabricated by 0.35 um STD90 cell library of Samsung Electronics.