• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.2
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• pp.87-95
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• 1996

We have studied the effects of La concentration on the optical and electrical properties of lead lanthanum titanate (PLT) thin films by using sol-gel method. Both the optical and electrical properties are greatly affected by the La concentration. The refreactiv eindices of the films varied from 2.23 to 1.93 with varying La concentration in the range from 15 to 33 mol%. The dielectric constants of the films vary form 340 to 870 with varying La concentration in the range form 15 to 33 mol%. Hysteresis loop becomes slimmer with the increase of La concentration form 15 to 28mol% and little fatter again with the increase of La concentration form 28 to 33 mol%. Among the films investigated in this research, PLT(28) thin film shows the best dielectric properties for the application to the dielectrics of ULSI DRAM's. At the frequency of 100Hz, the dielectric constant and the loss tangent of PLT(28) thin films are 940 and 0.08 respectively. Its leakage current density at 1.5${\times}10^{5}$V/cm is 1${\times}10^{-6}A/cm^{2}$. The comparision between the simulated and the experimental curves for the switching transient characteristics shows that PLT (28) thin films behaves like normal dielectrics.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.11
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• pp.603-608
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• 2000

$(Ba, Sr)TiO_{3}$[BST] thin films were fabricated on the Pt/TiO$_2$/SiO$_2$/Si substrate by the RF sputtering. The structure and dielectric properties of the BST thin films with the substrate temperature were investigated. Increasing the substrate temperature, The BST phase increased and barium multi titanate phases decreased. Increasing the frequency, the dielectric constant decreased and the dielectric loss increased. The dielectric constant and dielectric loss of the BST thin films deposited at 50$0^{\circ}C$ were 300 and 0.018, respectively at 1 kHz. The leakage current density of the BST thin films deposited at 50$0^{\circ}C$ was $10^{-9}$ A/$\textrm{cm}^2$ with applied voltage of 3V. Because of the high dielectric constant(300), low dielectric loss(0.018) and low leakage current($10^{-9}$ A/$\textrm{cm}^2$), BST thin films deposited at 50$0^{\circ}C$ is expecting for the application of DRAM.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.7
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• pp.592-597
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• 2000

In this study (B $a_{0.5}$/S $r_{0.5}$)Ti $O_3$[BST(50/50)] ceramic thin films were prepared by the Sol-Gel method BST(50/50) stock solution was made and spin-coated on the Indium Tin Oxide(ITO)/glass substrate at 4000 rpm for 30 seconds. The coated films were dried at 35$0^{\circ}C$ for 10 minutes and annealed at 650~75$0^{\circ}C$ for 1 hour. The microstructural properties of the BST(50/50) thin film were studied by the XRD and AFM. The ferroelectric perovskite phase was formed at the annealing condition of 75$0^{\circ}C$ for 1 hour. Dielectric constant and loss of this thin were 370, 3.7% at room temperature respectively. The polarization switching voltage showed the good value of 3V. The leakage current density of the BST(50/50) thin film was 10$^{-7A}$c $m^2$with applied voltage of 1.5V. BST(50/50) thin film capacitors having good dielectric and electrical properties are expecting for the application to the dielectric material of DRAM.RAM.M.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.5
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• pp.689-695
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• 2002

Film compositions are needed in semiconductor manufacturing for such diverse application as production tool qualifications and process development. Surface and interface information is generally provided with Auger electron spectroscopy(AES). In this paper, WSix films were analyzed for structural, electrical, and compositional properties of tungsten silicide thin films produced by low pressure chemical vapor deposition as a function of temperature, DCS post flow, shower head life time, and the silicon to tungsten ratios have been investigated. We find that Si/W composition ratio is increased in the surface and interface of WSix thin films by the DCS post flow process and increasing deposition temperature, respectively. The results obtained in this study are also applicable to process control of WSix deposition for memory device fabrication.

• Proceedings of the Korea Information Processing Society Conference
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• 2010.11a
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• pp.852-854
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• 2010

MCM-ERC32 는 우주 환경에서 동작하는 시스템에 사용할 목적으로 유럽에서 개발된 집약 프로세서 모듈이다. MCM (Multi Chip Module)은 크게 ERC32 single chip 과 VASI (Very Advanced Sparc Interface) 및 6MByte 의 SRAM, 32MByte 의 DRAM 으로 구성되어 있다. VASI 의 경우 각종 I/O 처리 및 timer 의 기능을 수행하며 특히 VASI RTC 의 경우 VASI cycle, slot 을 이용하여 다양한 형태의 timer 구현이 가능하다. Timer 의 경우 각종 태스크의 관리와 스케줄링에 사용되는 가장 기본적이며 매우 중요한 요소이다. 위성의 고유 시간 역시 timer 를 활용하여 설계하게 되는데 이 부분이 잘 구현 되어야 정확한 임무 수행 및 위성의 제어가 가능하다. 본 논문에서는 VASI RTC 의 구조와 기능에 대해 설명하고 이를 위성의 고유 시간 운영에 적용하는 방법에 대해 다루도록 하겠다.

• Journal of Advanced Navigation Technology
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• v.13 no.6
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• pp.957-963
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• 2009

It is necessary for the resource management system to manage for the resource in distributed networking environment. Because of increasing the complexity of vast computer system and business environment, needs of RMS is increasing. Based on the common information model to use of objected oriented technology, through analysis of the reference model for the resource management system of the SNIA, we intend to implement the application program to manage the NGS system that consist of SSD and DRAM. To visualize, it is use the GUI Interface. It is possible for application program(Client) to detect and manage the system that consist of the NGS system. Also, status information that is divided into three cataloges(Minor/Major/Critical) can be displayed and it provide support of configuration functionality to manage devices.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.5
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• pp.185-190
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• 2002

Capacitor material utilized in the downsizing passive devices and dynamic random access memory(DRAM) requires the physical and electrical properties at given area such as capacitor thickness reduction, relative dielectric constant increase, low leakage current and thermal stability. Common capacitor materials, $SiO_2$, $Si_3N_4$, $SiO_2$/$Si_3N_4$,TaN and et al., used until recently have reached their physical limits in their application to several hundred angstrom scale capacitor. $Ta_2O_{5}$ is known to be a good alternative to the existing materials for the capacitor application because of its high dielectric constant (25 ~35), low leakage current and high breakdown strength. Despite the numerous investigations of $Ta_2O_{5}$ material, there have little been established the clear understanding of the annealing effect on capacitance characteristic and conduction mechanism, design and fabrication for $Ta_2O_{5}$ film capacitor. This study presents the structure-property relationship of reactive-sputtered $Ta_2O_{5}$ MIM capacitor structure processed by annealing in a vacuum. X-ray diffraction patterns skewed the existence of amorphous phase in as-deposited condition and the formation of preferentially oriented-$Ta_2O_{5}$ in 670, $700^{\circ}C$ annealing. On 670, $700^{\circ}C$ annealing under the vacuum, the leakage current decrease and the enhanced temperature-capacitance characteristic stability. and the leakage current behavior is stable irrespective of applied electric field. The results states that keeping $Ta_2O_{5}$ annealed at vacuum gives rise to improvement of electrical characteristics in the capacitor by reducing oxygen-vacancy and the broken bond between Ta and O.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.77.1-77.1
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• 2013

Atomic layer deposition (ALD) is known for its self-limiting reaction, which offers atomic-level controllability of the growth of thin films for a wide range of applications. The self-limiting mechanism leads to very useful properties, such as excellent uniformity over a large area and superior conformality on complex structures. These unique features of ALD provide promising opportunities for future electronics. Although the ALD of Al2O3 film (using trimethyl-aluminum and water as a metal precursor and oxygen source, respectively) can be regarded as a representative example of an ideal ALD based on the completely self-limiting reaction, there are many cases deviating from the ideal ALD reaction in recently developed ALD processes. The nonconventional aspects of the ALD reactions may strongly influence the various properties of the functional materials grown by ALD, and the lack of comprehension of these aspects has made ALD difficult to control. In this respect, several dominant factors that complicate ALD reactions, including the types of metal precursors, non-metal precursors (oxygen sources or reducing agents), and substrates, will be discussed in this presentation. Several functional materials for future electronics, such as higher-k dielectrics (TiO2, SrTiO3) for DRAM application, and resistive switching materials (NiO) for RRAM application, will be addressed in this talk. Unwanted supply of oxygen atoms from the substrate or other component oxide to the incoming precursors during the precursor pulse step, and outward diffusion of substrate atoms to the growing film surface even during the steady-state growth influenced the growth, crystal structure, and properties of the various films.

• Journal of the Korean institute of surface engineering
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• v.48 no.6
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• pp.360-370
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• 2015

As the size of the semiconductor devices shrinks to nanometer scale, the importance of plasma etching process to the fabrication of nanometer scale semiconductor devices is increasing further and further. But for the nanoscale devices, conventional plasma etching technique is extremely difficult to meet the requirement of the device fabrication, therefore, other etching techniques such as use of multi frequency plasma, source/bias/gas pulsing, etc. are investigated to meet the etching target. Until today, various pulsing techniques including pulsed plasma source and/or pulse-biased plasma etching have been tested on various materials. In this review, the experimental/theoretical studies of pulsed plasmas during the nanoscale plasma etching on etch profile, etch selectivity, uniformity, etc. have been summarized. Especially, the researches of pulsed plasma on the etching of silicon, $SiO_2$, and magnetic materials in the semiconductor industry for further device scaling have been discussed. Those results demonstrated the importance of pulse plasma on the pattern control for achieving the best performance. Although some of the pulsing mechanism is not well established, it is believed that this review will give a certain understanding on the pulsed plasma techniques.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.3
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• pp.44-54
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• 2000

In this paper, a design methodology for the frequency-adaptive negative-delay circuit which can be implemented in standard CMOS memory process is proposed. The proposed negative-delay circuit which is a basic type of the analog SMD (synchronous mirror delay) measures the time difference between the input clock period and the target negative delay by utilizing analog behavior and repeats it in the next coming cycle. A new technology that compensates the auxiliary delay related with the output clock in the measure stage differentiates the Proposed method from the conventional method that compensates it in the delay-model stage which comes before the measure stage. A wider negative-delay range especially prominent in the high frequency performance than that in the conventional method can be realized through the proposed technology. In order to implement the wide locking range, a new frequency detector and the method for optimizing the bias condition of the analog circuit are suggested. An application example to the clocking circuits of a DDR SDRAM is simulated and demonstrated in a 0.6 ${\mu}{\textrm}{m}$ n-well double-poly double-metal CMOS technology.