• Title/Summary/Keyword: DEVS 다이어그램

Search Result 5, Processing Time 0.027 seconds

Implementation and Static Verification Methodology of Discrete Event Simulation Software based on the DEVS Diagram: A Practical Approach (DEVS 다이어그램 기반 이산사건 시뮬레이션 소프트웨어 구현 및 정적 검증기법: 실용적 접근방법)

  • Song, Hae Sang
    • Journal of the Korea Society for Simulation
    • /
    • v.27 no.3
    • /
    • pp.23-36
    • /
    • 2018
  • Discrete Event System Specification (DEVS) has been used for decades as it provides sound semantics for hierarchical modular specification of discrete event systems. Instead of the mathematical specification, the DEVS diagram, based on the structured DEVS formalism, has provided more intuitive and convenient representation of complex DEVS models. This paper proposes a clean room process for implementation and verification of a DEVS diagram model specification into a simulation software source code. Specifically, it underlies a sequence of transformation steps from conformance and integrity checking of a given diagram model, translation into a corresponding tabular model, and finally conversion to a simulation source code, with each step being inversely verifiable for traceability. A simple example helps developers to understand the proposed process with associated transformation methods; a case study shows that the proposed process is effective for and adaptable to practical simulation software development.

Structured DEVS Formalism: A Structural Modelling Method of Discrete Event Systems (Structured DEVS Formalism: 이산사건 시스템의 구조적 모델링 기법)

  • Song, Hae-Sang
    • Journal of the Korea Society for Simulation
    • /
    • v.21 no.2
    • /
    • pp.19-30
    • /
    • 2012
  • In recent decades, it has been known that the Discrete Event System Specification, or DEVS, formalism provides sound semantics to design a modular and hierarchical model of a discrete event system. In spite of this benefit, practitioners have difficulties in applying the semantics to real-world systems modeling because DEVS needs to specify a large size of sets of events and/or states in an unstructured form. To resolve the difficulties, this paper proposes an extension of the DEVS formalism, called the Structured DEVS formalism, with an associated graphical representation, called the DEVS diagram, by means of structural representation of such sets based on closure property of set theory. The proposed formalism is proved to be equivalent to the original DEVS formalism in their model specification, yet the new formalism specifies sets in a structured form with a concept of phases, variables and ports. A simplified example of the structured DEVS with the DEVS diagram shows the effectiveness of the proposed formalism which can be easily implemented in an objected-oriented simulation environment.

Software Formal Verification Methodology using Aspect DEVS Verification Framework (Aspect DEVS 검증 틀을 이용한 소프트웨어 정형 검증 방법론)

  • Choi, Chang-Beom;Kim, Tag-Gon
    • Journal of the Korea Society for Simulation
    • /
    • v.18 no.3
    • /
    • pp.113-122
    • /
    • 2009
  • Software is getting more complex due to a variety of requirements that include desired functions and properties. Therefore, verifying and testing the software are complicated problems. Moreover, if the software is already implemented, inserting and deleting tracing/logging code into the source code may cause several problems, such as the code tangling and the code scattering problems. This paper proposes the Aspect DEVS Verification Framework which supports the verification and testing process. The Aspect DEVS Verification Framework utilizes Aspect Oriented Programming features to handle the code tangling and the code scattering problems. By applying aspect oriented features, a user can find and fix the inconsistency between requirement and implementation of a software without suffering the problems. The first step of the verification process is the building aspect code to make a software act as a generator. The second step is developing a requirement specification using DEVS diagrams and implementing it using the DEVSIM++. The final step is comparing the event traces from the software with the possible execution sequences from DEVS model.

GPU-accelerated Reliability Analysis Method using Dynamic Reliability Block Diagram based on DEVS Formalism (DEVS 형식론 기반의 Dynamic Reliability Block Diagram과 GPU 가속 기술을 이용한 신뢰도 분석 방법)

  • Ha, Sol;Ku, Namkug;Roh, Myung-Il
    • Journal of the Korea Society for Simulation
    • /
    • v.22 no.4
    • /
    • pp.109-118
    • /
    • 2013
  • This paper adopts the system configuration to assess the reliability instead of making a fault tree (FT), which is a traditional method to analyze reliability of a certain system; this is the reliability block diagram (RBD) method. The RBD method is a graphical presentation of a system diagram connecting the subsystems of components according to their functions or reliability relationships. The equipment model for the reliability simulation is modeled based on the discrete event system specification (DEVS) formalism. In order to make various alternatives of target system, this paper also adopts the system entity structure (SES), an ontological framework that hierarchically represents the elements of a system and their relationships. To enhance the calculation time of reliability analysis, GPU-based accelerations are adopted to the reliability simulation.

The DEVS Integrated Development Environment for Simulation-based Battle experimentation (시뮬레이션 기반 전투실험을 위한 DEVS 통합 개발 환경)

  • Hwang, Kun-Chul;Lee, Min-Gyu;Han, Seung-Jin;Yoon, Jae-Moon;You, Yong-Jun;Kim, Sun-Bum;Kim, Jung-Hoon;Nah, Young-In;Lee, Dong-Hoon
    • Journal of the Korea Society for Simulation
    • /
    • v.22 no.4
    • /
    • pp.39-47
    • /
    • 2013
  • Simulation based Battle Experimentation is to examine the readiness for a battle using simulation technology. It heavily relies on the weapon systems modeling and simulation. To analyze the characteristics and complexity of the weapon systems in the experiment, the modeling & simulation environment has to be able to break down the system of systems into components and make the use of high fidelity components such as real hardware in simulation. In that sense, the modular and hierarchical structure of DEVS (Discrete EVent System Specification) framework provides potentials to meet the requirements of the battle experimentation environment. This paper describes the development of the DEVS integrated development environment for Simulation based Battle Experimentation. With the design principles of easy, flexible, and fast battle simulation, the newly developed battle experimentation tool mainly consists of 3 parts - model based graphical design tool for making DEVS models and linking them with external simulators easily through diagrams, the experiment plan tool for speeding up a statistic analysis, the standard components model libraries for lego-like building up a weapon system. This noble simulation environment is to provide a means to analyze complex simulation based experiments with different levels of models mixed in a simpler and more efficient way.