• Title/Summary/Keyword: DCT coefficient

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A study on pattern recognition using DCT and neural network (DCT와 신경회로망을 이용한 패턴인식에 관한 연구)

  • 이명길;이주신
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.3
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    • pp.481-492
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    • 1997
  • This paper presents an algorithm for recognizing surface mount device(SMD) IC pattern based on the error back propoagation(EBP) neural network and discrete cosine transform(DCT). In this approach, we chose such parameters as frequency, angle, translation and amplitude for the shape informantion of SMD IC, which are calculated from the coefficient matrix of DCT. These feature parameters are normalized and then used for the input vector of neural network which is capable of adapting the surroundings such as variation of illumination, arrangement of objects and translation. Learning of EBP neural network is carried out until maximum error of the output layer is less then 0.020 and consequently, after the learning of forty thousand times, the maximum error have got to this value. Experimental results show that the rate of recognition is 100% in case of the random pattern taken at a similar circumstance as well as normalized training pattern. It also show that proposed method is not only relatively relatively simple compare with the traditional space domain method in extracting the feature parameter but also able to re recognize the pattern's class, position, and existence.

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Image Coding Using DCT and Block Hierarchical Segmentation Finite-State Vector Quantization (DCT와 블록 계층 분할 유한상태 벡터 양자화를 이용한 영상 부호화)

  • Jo, Seong-Hwan;Kim, Eung-Seong
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.3
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    • pp.1013-1020
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    • 2000
  • In this paper, we propose an algorithm which segments hierarchically blocks of image using discrete cosine transform(DCT) and execute finite-state vector quantization (FSVQ) for each block. Using DCT coefficient feature, image is segmented hierarchically to large smooth block and small edge block, then the block hierarchy informations are transmitted. The codebooks are respectively constructed for each hierarchical blocks, the encoder transmits codeword index using FSVQ for reducing encoded bit with hierarchical segmentation. Compared with side match VQ(SMVQ) and hierarchical FSVQ(HFSVQ) algorithm, about Zelda and Boat image, the new algorithm shows better picture quality with 1.97dB and 2.85 dB difference as to SMVQ, 1.78dB and 1.85dB diffences as to HFSVQ respectively.

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The Reconfigurable Processor Design of DCT/DWT (재구성 가능한 DCT/DWT 프로세서 설계)

  • Kim, Young-Jin;Lee, Hyon-Soo
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.07a
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    • pp.730-732
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    • 2005
  • 최근 이미지 압축, 워터마킹 또는 스케일러블 비디오 코딩 분야에서 DCT와 DWT 연산을 선택적으로 사용하거나, 혼합하여 사용하는 경우가 늘어나고 있다. 이러한 두개의 연산을 사용하는 방법은 소프트웨어적인 프로그램을 사용하거나 하드웨어를 따로 구현하여 사용하였다. 본 연구에서는 하나의 모듈로 두개의 연산을 수행할 수 있는 재구성 하드웨어를 제안한다. 또한 DCT와 DWT연산에 있어서, 가장 많은 연산을 수행하는 부분은 계수(Coefficient)값과 입력 값의 내적 연산(Inner Product)을 수행하는 것인데, 이 내적연산을 하는데 있어서 곱셈기를 사용하지 않는 분산연산을 사용함으로써 연산의 복잡도를 줄이고, 하드웨어의 속도를 빠르게 하였다. 실험 환경은 Altera FPGA를 사용한 Excalibur_ARM (EPXA10F1020Cl) 보드를 이용하여 구현하였으며, 동작속도는 47.85MHz이다.

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Performance Comparison of DCT Algorithm Implementations Based on Hardware Architecture (프로세서 구조에 따른 DCT 알고리즘의 구현 성능 비교)

  • Lee Jae-Seong;Pack Young-Cheol;Youn Dae-Hee
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.6C
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    • pp.637-644
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    • 2006
  • This paper presents performance and implementation comparisons of standard and fast DCT algorithms that are commonly used for subband filter bank in MPEG audio coders. The comparison is made according to the architectural difference of the implementation hardware. Fast DCT algorithms are known to have much less computational complexity than the standard method that involves computing a vector dot product of cosine coefficient. But, due to structural irregularity, fast DCT algorithms require extra cycles to generate the addresses for operands and to realign interim data. When algorithms are implemented using DSP processors that provide special operations such as single-cycle MAC (multiply-accumulate), zero-overhead nested loop, the standard algorithm is more advantageous than the fast algorithms. Also, in case of the finite-precision processing, the error performance of the standard method is far superior to that of the fast algorithms. In this paper, truncation errors and algorithmic suitability are analyzed and implementation results are provided to support the analysis.

Fast Intra Coding using DCT Coefficients (DCT 계수를 이용한 고속 인트라 코딩)

  • Kim, Ga-Ram;Kim, Nam-Uk;Lee, Yung-Lyul
    • Journal of Broadcast Engineering
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    • v.20 no.6
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    • pp.862-870
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    • 2015
  • The RDO (Rate Distortion Optimization) process of HEVC results in good coding efficiency, but relatively requires much encoding time. In order to reduce the encoding time of RDO process, this paper proposes a method of fast intra prediction mode decision using DCT coefficients distributions and the existence of DCT coefficients. The proposed fast Intra coding sets the number of intra prediction mode candidates to three(3) from the RMD (Rough Mode Decision) process in HM16.0 reference SW and reduces the number of candidates one more time by investigating DCT coefficients distribution. After that, if there exists a quantized DCT block having all zero coefficient values for a specific candidate before the RDO process, the candidate is chosen without the RDO process. The proposed method reduces the encoder complexity on average 46%, while the coding efficiency is 2.1% decreased compared with the HEVC encoder.

Variable Radix-Two Multibit Coding and Its VLSI Implementation of DCT/IDCT (가변길이 다중비트 코딩을 이용한 DCT/IDCT의 설계)

  • 김대원;최준림
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.12
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    • pp.1062-1070
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    • 2002
  • In this paper, variable radix-two multibit coding algorithm is presented and applied in the implementation of discrete cosine transform(DCT) and inverse discrete cosine transform(IDCT). Variable radix-two multibit coding means the 2k SD (signed digit) representation of overlapped multibit scanning with variable shift method. SD represented by 2k generates partial products, which can be easily implemented with shifters and adders. This algorithm is most powerful for the hardware implementation of DCT/IDCT with constant coefficient matrix multiplication. This paper introduces the suggested algorithm, it's proof and the implementation of DCT/IDCT The implemented IDCT chip with 8 PEs(Processing Elements) and one transpose memory runs at a tate of 400 Mpixels/sec at 54MHz frequency for high speed parallel signal processing, and it's verified in HDTV and MPEG decoder.

New Binarization Method of Transformed Coefficient for CABAC In H.264/AVC (H.264/AVC의 CABAC 엔트로피 부호기를 위한 변환 계수의 새로운 이진화 방법)

  • Kim, Dae-Yeon;Lee, Yung-Lyul
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.45 no.1
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    • pp.64-74
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    • 2008
  • It is well-known that the coding efficiency of CABAC which is one of the entropy coding methods in H.264/AVC is lower than that of CAVLC at high bitrate in intra coding, even if CABAC shows higher coding efficiency than CAVLC. Therefore, for high quality video application, this paper proposes new binarization methods about the quantized DCT coefficients that are partitioned into four regions such that CABAC shows similar coding efficiency to CAVLC at high bitrate. The proposed binarization methods consist of separate binarization tables about the four partitioned DCT coefficients considering the statistical characteristics of the quantized DCT coefficients. The proposed binarizaton method for the quantized DCT coefficients shows higher coding efficiency than CABAC in H.264/AVC and shows very similar result to CAVLC at high bitrate.

Low-power Focus Value Calculation Algorithm using modified DCT for the mobile phone (개선된 이산 코사인 변환을 이용한 모바일 폰 용 저전력 초점 값 계산 알고리즘)

  • Lee Sang-Yong;Park Sang-Soo;Kim Soo-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.11
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    • pp.49-54
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    • 2005
  • This paper proposes the low power MDCT algorithm for precise FV with minimum size of sub-window in mobile phone. Proposed algerian uses the coefficient at the middle of whole result process requiring the least number of calculations, since it has a good characteristic when used as standard of the FV and needs minimum amount of operation. In addition, using the DCT result related to the middle frequency makes the characteristic of FV more superior because it suppresses the impulsive noise and difference of focus values is larger than any others. The proposed algorithm is implemented using Verilog HDL and verified using Excalibur-ARM board.

Improved Intraframe Coding Method based on H.263 Annex I (H.263 Annex I 기반 화면내 부호화 기법의 성능개선)

  • 유국열
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2001.06a
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    • pp.213-216
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    • 2001
  • The H.263 Annex I method for the intraframe coding is based on the prediction in DCT domain, unlike JPEG, MPEG-1, and MPEG-2 where the intraframe coding uses block DCT, independent of the neighboring blocks. In this paper, we show the ineffectiveness of H.263 Annex I prediction method by mathematically deriving the spatial domain meaning of H.263 Annex I prediction method. Based on the derivation, we propose a prediction method which is based on the spatial correlation property of image signals. From the experiment and derivation, we verified the proposed method.

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Visual-Weighted DCT Coding for Monochrome Still Images (흑백 정지 영상의 시기 하중 DCT 부호화)

  • 황재정;양근호;이문호
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.29B no.11
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    • pp.93-101
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    • 1992
  • HVS based transform coding techniques for still images take the lowest spatial frequency and luminance contrast sensitivity as the most crucial factors in determining the image quality perceived by human eye. Only the frequency weighting has been main issue. The proposed Weighted Discrete Cosine Transform (WDCT) has the lowest frequency of about 4 [cyc/deg] in 8$\times$8 subblock with the contrast-weighted DC coefficient. The error criteria have been rederived to adapt the contrast weighting for performance evaluation. The proposed scheme has produced higher quality images compared to the unweighted and other schemes.

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