• Journal of the Korea Society of Computer and Information
• /
• v.26 no.2
• /
• pp.53-60
• /
• 2021

In this paper, we aimed to identify the insulation characteristics and reliability of Epoxy composites, which are widely used as insulation material for electrical & electronic components and electric appliance. To this end, it was necessary to predict variations of electric field due to the distribution of fillers that must be added by economic and mechanical factors. So, we verified the result using an electric field analysis Simulator. Furthermore, under the condtion of DC voltage application, an dielectirc breakdown test was performed according to ambient temperature changes and the distribution of fillers, and the changes were observed. Three types of specimens were manufactured by adding 0, 50 and 100[phr] filling to Epoxy resin. In all specimens, as temperature was increased, the strength of the dielectric strength was decreased. When comparing the simulation results with the actual dielectric breakdown test results, we was able to confirm the technical applicability required for Insulation design of electric appliance.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.35 no.3
• /
• pp.303-307
• /
• 2022

Magnetoelectric (ME) properties of 3-0 type particulate composites have been investigated with respect to application features for reliable magnetic sensitivity and magnetically-induced output voltage. In order to figure out the magnetoelectric characteristics in the ME composites, frequency dependent ME responses were studied from [0.948 Na_0.5K_0.5NbO₃-0.052 LiSbO₃]-[Co_1-xZn_xFe₂O₄] (NKNLS)/Co_1-xZn_xFe₂O₄ (CZFO, x=0, 0.1, and 0.2). As a result, the maximal α_ME of 23.15 mV/cm·Oe was achieved from the NKNLS-CZFO (x_Zn = 0.1) composites at resonance frequency of 315 kHz and H_dc = 0 Oe. From the frequency dependent ME responses, it is clearly described that the self-biased ME composites can be used for applications as both magnetic sensors and energy harvesters, respectively.

• Journal of Sensor Science and Technology
• /
• v.30 no.6
• /
• pp.369-375
• /
• 2021

In this study, heterogeneous ZnO/CNTF composites were developed to improve the NO₂-sensing response, facilitated by the self-heating property. Highly conductive and mechanically stable CNTFs were prepared by a wet-spinning process assisted by the liquid crystal (LC) behavior of CNTs. Metal-organic frameworks (MOFs) of ZIF-8 were precipitated on the surface of the CNTF (ZIF-8/CNTF) via one-pot synthesis in solution. The subsequent calcination process resulted in the formation of the ZnO/CNTF composites. The calcination temperatures were controlled at 400, 500, and 600 ℃ in an N₂ atmosphere to confirm the evolution of the microstructures and NO₂-sensing properties. Gas sensor characterization was performed at 100 ℃ by applying a DC voltage to induce Joule heating through the CNTF. The results revealed that the ZnO/CNTF composite after calcination at 500 ℃ (ZnO/CNTF-500) exhibited an improved response (R_air/R_gas = 1.086) toward 20 ppm NO₂ as compared to the pristine CNTF (R_air/R_gas = 1.063). Selective NO₂-sensing properties were demonstrated with negligible responses toward interfering gas species such as H₂S, NH₃, CO, and toluene. Our approach for the synthesis of MOF-driven ZnO/CNTF composites can provide a new strategy for the fabrication of wearable gas sensors integrated with textile materials.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.22 no.4
• /
• pp.67-72
• /
• 2022

This study presents the design of power amplifier (PA) in 60 nm GaN/Si HEMT technology. A customized transistor model enables the designing circuits operating at W-band. The all matching network of the PA was composed of equivalent transformer circuit to reduce matching loss. And then, equivalent transformer is several advantages without any additional inductive devices so that a wideband power characteristic can be achieved. The designed die area is 3900 ㎛ × 2300 ㎛. The designed results at center frequency achieved the small signal gain of 15.9 dB, the saturated output power (Psat) of 29.9 dBm, and the power added efficiency (PAE) of 24.2% at the supply voltage of 12 V.

• KOREAN JOURNAL OF PACKAGING SCIENCE & TECHNOLOGY
• /
• v.28 no.2
• /
• pp.143-149
• /
• 2022

PCS needs to freely switch AC and DC to connect the battery, external AC loads and renewable energy in both directions for energy efficiency. Whenever converting happens, power loss inevitably occurs. Minimization of the power loss to save electricity and convert it for usage is a very critical function in PCS. PCS plays an important role in the ESS(Energy Storage System) but the importance of stabilizing semiconductors on PCB(Printed Circuit Board) should be empathized with a risk of failure such as a fire explosion. In this study, the temperature variation inside PCS was reviewed by cooling fan on top of PCS, and the vibration characteristics of PCS were analyzed during truck transportation for reliability of the product. In most cases, a cooling fan is mounted to control the inner temperature at the upper part of the PCS and components generating the heat placed on the internal aluminum cooling plate to apply the primary cooling and the secondary cooling system with inlet fans for the external air. Results of CFD showed slightly lack of circulating capacity but simulated temperatures were durable for components. The resonance points of PCS were various due to the complexity of components. Although they were less than 40 Hz which mostly occurs breakage, it was analyzed that the vibration displacement in the resonance frequency band was very insufficient. As a result of random-vibration simulation, the lower part was analyzed as the stress-concentrated point but no breakage was shown. The steel sheet could be stable for now, but for long-term domestic transportation, structural coupling may occur due to accumulation of fatigue strength. After the test completed, output voltage of the product had lost so that extra packaging such as bubble wrap should be considered.

• Journal of Advanced Navigation Technology
• /
• v.27 no.4
• /
• pp.463-468
• /
• 2023

In this paper, we proposed reconfigurable dual polarization patch array antenna that can select two polarizations(Vertical, RHCP) using defected ground structure and Pin diode. The proposed antenna was designed arranging a circular polarization patch antenna implemented with a square microstrip patch and two slots 3x3 at 25.8mm placed, a half-wavelength of 5.8 GHz. Conect the pin diode and the capacitor to the slot diagonally placed on the ground of each antennas, and select polarization using the open/short operating according to the application of DC voltage to the pin diode. As a result of the design, the gain of the antenna is 11.7 dBi at vertical polarization and 11.6 dBic at RHCP. The axial ratio is 20.3 dB at 1.8 dB vertical polarization at RHCP. Mutual Coupling is Maximum to -20.8 dB for vertical polarization and Maximum to -30.1 dB for RHCP.

• Korean Journal of Materials Research
• /
• v.33 no.11
• /
• pp.497-501
• /
• 2023

ZnO/Cu/ZnO (ZCZ) thin films were deposited at room temperature on a glass substrate using direct current (DC) and radio frequency (RF, 13.56 MHz) magnetron sputtering and then the effect of post-deposition electron irradiation on the structural, optical, electrical and transparent heater properties of the films were considered. ZCZ films that were electron beam irradiated at 500 eV showed an increase in the grain sizes of their ZnO(102) and (201) planes to 15.17 nm and 11.51 nm, respectively, from grain sizes of 13.50 nm and 10.60 nm observed in the as deposited films. In addition, the film's optical and electrical properties also depended on the electron irradiation energies. The highest opto-electrical performance was observed in films electron irradiated at 500 eV. In a heat radiation test, when a bias voltage of 18 V was applied to the film that had been electron irradiated at 500 eV, its steady state temperature was about 90.5 ℃. In a repetition test, it reached the steady state temperature within 60 s at all bias voltages.

• Journal of the Korean Vacuum Society
• /
• v.6 no.4
• /
• pp.348-353
• /
• 1997

Hydrogenated amorphous carbon(a-C:H) films were deposited on p-type Si(100) by DC saddle-field plasma enhanced CVD to investigate the effect of substrate bias on optical properties and structural changes. They were deposited using pure methane gas at a wide range of substrate bias at room temperature and 90 mtorr. The substrate bias voltage ($V_s$) was employed from $V_s=0 V$ to $V_s=400 V$. The information of optical properties was investigated by photoluminescence and transmitance. Chemical bondings of a-C:H have been explored from FT-IR and Raman spectroscopy. The thickness and relative hydrogen content of the films were measured by Rutherford backscattering spectroscopy (RBS) and elastic recoil detection (ERD) technigue. The growth rate of a-C:H film was decreased with the increase of $V_s$, but the hydrogen content of the film was increased with the increase of $V_s$. The a-C:H films deposited at the lowest $V_s$ contain the smallest amount of hydrogen with most of C-H bonds in the of $CH_2$ configuration, whereas the films produced at higher $V_s$ reveal dominant the $CH_3$ bonding structure. The emission of white photoluminescence from the films were observed even with naked eyes at room temperature and the PL intensity of the film has the maximum value at $V_s$=200 V. With $V_s$ lower than 200 V, the PL intensity of the film increased with V, but for V, higher than 200 V, the PL intensity decreased with the increase of $V_s$. The peak energy of the PL spectra slightly shifted to the higher energy with the increase of $V_s$. The optical bandgap of the film, determined by optical transmittance, was increased from 1.5 eV at $V_s$=0V to 2.3 eV at $V_s$=400 V. But there were no obvious relations between the PL peak and the optical gap which were measured by Tauc process.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.7
• /
• pp.122-130
• /
• 2013

This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.11 s.353
• /
• pp.48-57
• /
• 2006

This work describes a 12b 200KHz 0.52mA $0.47mm^2$ algorithmic ADC for sensor applications such as motor controls, 3-phase power controls, and CMOS image sensors simultaneously requiring ultra-low power and small size. The proposed ADC is based on the conventional algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. The input SHA with eight input channels for high integration employs a folded-cascode architecture to achieve a required DC gain and a sufficient phase margin. A signal insensitive 3-D fully symmetrical layout with critical signal lines shielded reduces the capacitor and device mismatch of the MDAC. The improved switched bias power-reduction techniques reduce the power consumption of analog amplifiers. Current and voltage references are integrated on the chip with optional off-chip voltage references for low glitch noise. The employed down-sampling clock signal selects the sampling rate of 200KS/s or 10KS/s with a reduced power depending on applications. The prototype ADC in a 0.18um n-well 1P6M CMOS technology demonstrates the measured DNL and INL within 0.76LSB and 2.47LSB. The ADC shows a maximum SNDR and SFDR of 55dB and 70dB at all sampling frequencies up to 200KS/s, respectively. The active die area is $0.47mm^2$ and the chip consumes 0.94mW at 200KS/s and 0.63mW at 10KS/s at a 1.8V supply.