• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1707-1713
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• 2016

This paper proposes a dc error compensation algorithm using dq-synchronous coordinate transform digital phase-locked-loop in single-phase grid-connected converters. The dc errors are caused by analog to digital conversion and grid voltage during measurement. If the dc offset error is included in the phase-locked-loop system, it can cause distortion in the grid angle estimation with phase-locked-loop. Accordingly, recent study has dealt with the integral technique using the synchronous reference frame phase-locked-loop method. However, dynamic response is slow because it requires to monitor one period of grid voltage. In this paper, the dc offset error compensation algorithm of the improved response characteristic is proposed by using the synchronous reference frame phase-locked-loop. The simulation and the experimental results are presented to demonstrate the effectiveness of the proposed dc offset error compensation algorithm.

• 전기학회논문지
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• 제64권7호
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• pp.1005-1011
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• 2015

This paper proposes the DC offset compensation algorithm with fast response to the sensed grid voltage in the single-phase grid connected inverter. If the sensor of the grid voltage has problems, the DC offset of the grid voltage can be generated. This error must be resolved because the DC offset can generate the estimated grid frequency error of the phase-locked loop (PLL). In conventional algorithm to compensate the DC offset, the DC offset is estimated by integrating the synchronous reference frame d-axis voltage during one period of the grid voltage. The conventional algorithm has a drawback that is a slow dynamic response because monitoring the one period of the grid voltage is required. the proposed algorithm has fast dynamic response because the DC offset is consecutively estimated by transforming the d-axis voltage to synchronous reference frame without monitoring one cycle time of the grid voltage. The proposed algorithm is verified from PSIM simulation and the experiment.

• 한국태양에너지학회 논문집
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• 제33권6호
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• pp.92-97
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• 2013

This paper proposes DC offset current compensation method of transformerless fuel cell/PV PCS. DC offset current is generated by the unbalanced internal resistance of the switching devices in full bridge topology. The other cause is the sensitivity of the current sensor, which is lower than DSP in resolution. If power converter system has these causes, the AC output current in the inverter will generate the DC offset. In case of transformerless grid-connected inverter system, DC offset current is fatal to grid-side, which results in saturating grid side transformer. Several simulation results show the difficulties of detecting DC offset current. Detecting DC offset current method consists of the differential amplifiers and PWM is compensated by the output of the Op amp circuit with integrator controller. PSIM simulation verifies that the proposed method is simpler and more effective than using low resolution current sensor alone.

• 조명전기설비학회논문지
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• 제27권7호
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• pp.29-36
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• 2013

In this paper, a new DC offset elimination filter is proposed for an accurate phasor extraction of fundamental frequency component. The proposed method can eliminate a DC offset component which is decayed exponentially. The proposed method uses only one cycle of data for phasor extraction computation, which does not need to preset the time constant of the DC offset component. Also, the other advantages of the proposed method is that gain compensation or phase compensation is not required after filtering. Simulations using ATP were performed to evaluate the performance of the proposed filter method, and the results were compared to the ones obtained by conventional methods.

• Journal of Electrical Engineering and Technology
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• 제1권3호
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• pp.279-286
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• 2006

A method for estimating the instantaneous phasor of a fault current signal is proposed for high-speed distance protection that is immune to a DC-offset. The method uses a modified notch filter in order to eliminate the power frequency component from the fault current signal. Since the output of the modified notch filter is the delayed DC-offset, delay compensation results in the same waveform as the original DC-offset. Subtracting the obtained DC-offset from the fault current signal yields a sinusoidal waveform, which becomes the real part of the instantaneous phasor. The imaginary part of the instantaneous phasor is based on the first difference of the fault current signal. Since a DC-offset also appears in the first difference, the DC-offset is removed trom the first difference using the results of the delay compensation. The performance of the proposed method was evaluated for a-phase to ground faults on a 345kV 100km overhead transmission line. The Electromagnetic Transient Program was utilized to generate fault current signals for different fault locations and fault inception angles. The performance evaluation showed that the proposed method can estimate the instantaneous phasor of a fault current signal with high speed and high accuracy.

• Journal of Power Electronics
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• 제15권6호
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• pp.1593-1600
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• 2015

This paper proposes a novel compensation algorithm of current offset error for single-phase linear compressor in home appliances. In a half-bridge inverter, current offset error may cause unbalanced DC-link voltage when the DC-link is comprised of two serially connected capacitors. To compensate the current measurement error, the synchronous reference frame transformation is used for detecting the measurement error. When an offset error occurs in the output current of the half-bridge inverter, the d-axis current has a ripple with frequency equal to the fundamental frequency. With the use of a proportional-resonant controller, the ripple component can be removed, and offset error can be compensated. The proposed compensation method can easily be implemented without much computation and additional hardware circuit. The validity of the proposed algorithm is verified through experimental results.

• 천문학회보
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• 제37권2호
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• pp.157.2-157.2
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• 2012

Direct-conversion receivers often suffer from a DC-offset that is a by-product of the direct conversion process to baseband. In general, a basic approach to reduce the DC-offset is to do simple average of the baseband signal and remove the DC by subtracting the average. However, this gives rise to a residual DC offset which degrades the performance when the receiver adopts the coding schemes with high coding rates such as 8-PSK. Therefore, more advanced methods should be additionally required for better performance. While the training sequences are basically designed to have good auto-correlation properties to facilitate the channel estimation, they may be not good for the simultaneous estimation of the channel response and the DC-offset. Also the DC offset compensation under a bad condition does not give good results due to the estimation error. Correspondingly, the proposed scheme employs the two important points. First, the training sequence codes are divided into two groups by MSE(Mean Squared Errors) for estimating the channel taps and then SNR calculated from each group is compared to predefined threshold to do fine DC-offset estimation. Next, ON/OFF module is applied for preventing performance degradation by large estimation error under severe channel conditions. The simulation results of the proposed scheme shows good performances compared to the existing algorithm. As a result, this scheme is surely applicable to the receiver design in many communications systems.

• 전력전자학회논문지
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• 제27권5호
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• pp.402-409
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• 2022

In vector-controlled drive systems, the current measurement offset error causes unwanted torque ripple, resulting in speed and torque control performance degradation. The current measurement offset error is caused by various factors, including thermal drift. This study proposes a simple DC offset error compensation method for a surface permanent magnet motor based on a disturbance observer. The disturbance observer is designed in the stationary reference frame. The proposed method uses only the measured current and machine parameters without additional hardware. The effect of parameter variations is analyzed, and the performance of the current measurement offset error compensation method is validated using simulation and experimental results.

• 한국통신학회논문지
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• 제24권10A호
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• pp.1507-1516
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• 1999

본 논문에서는 전력증폭기 선형화를 위한 Cartesian feedback 방식의 궤환 경로에서 발생하는 DC offset과 이득 및 위상 불일치를 자동적으로 보상하는 개선된 방식을 제안한다. Cartesian feedback에 의한 비선형 전력증폭기 왜곡성분의 감쇠 정도는 시스템 루프의 이득, 대역폭, 시간지연에 의해 결정된다고 알려져 있다. 그러나 궤환 경로 각 소자에서 발생하는 DC offset과 이득 및 위상의 불일치로 인하여 송신기의 출력신호에 원하지 않는 반송파 성분과 이미지 신호가 발생하여 궤환보상의 효과가 반감되는 결과를 초래한다. 본 논문에서는 디지털 신호처리 시스템 구조에서 이진 검색 (binary search) 알고리즘을 이용하여 궤환 경로에서 발생하는 DC offset과 이득 및 위상 불일치를 자동적으로 보상하는 방식을 제안하고 컴퓨터 모의실험을 통하여 제안된 방식의 성능을 분석한다. 모의실험에서 고려된 방식에 비하여 동일한 정도의 DC offset과 이득 및 위상 불일치의 보상에 걸리는 시간을 평균적으로 40% 단축할 수 있었다.

• Journal of Power Electronics
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• 제14권2호
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• pp.383-391
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• 2014

For the digital control of systems such as grid-connected inverters, measuring inverter output currents accurately is essential. However, current measurement offsets are inevitably generated by current measurement paths and cause DC current components in real inverter output currents. Real inverter output currents with DC components cause the DC-link capacitor voltage to oscillate at the frequency of a utility voltage. For these reasons, current measurement offsets deteriorate the overall system performance. A compensation strategy to eliminate the effect of current measurement offsets in grid-connected inverters is proposed in this study. The validity of the proposed compensation strategy is verified through simulations and experiments. Results show that the proposed compensation strategy improves the performance of grid-connected inverters.