• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.8
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• pp.650-655
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• 2013

For the DC-free encoding of source data, the Guided Scrambling (GS) technique is widely used as multi-mode coding in the optical data storage system. For DC-suppression GS coding in the holographic data storage system, the conservative array and balanced coding criteria are proposed. In this paper, equivalent integer programming models are developed to determine the optimal control bits for the minimum digital sum value (MDSV), conservative array, and balanced coding criteria. Using the proposed integer programming models, we compare the performance of GS encoding for the various combination of control bit/array sizes and scrambling polynomials.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.8
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• pp.644-649
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• 2013

For effective DC-free coding in the optical storage systems, the Guided Scrambling algorithm is widely used. To reduce digital discrepancy of the coded sequence, functions of digital sum value (DSV) are used as criteria to choose the best candidate. Among these criteria, the minimum digital sum value (MDSV), minium squared weight (MSW), and minimum threshold overrun (MTO) are popular methods for effective DC-suppression. In this paper, we formulate integer programming models that are equivalent to MDSV, MSW, and MTO GS coding. Incorporating the MDSV integer programming model in MaxMin setting, we develop an integer programming model that computes the worst case MDSV bound given scrambling polynomial and control bit size. In the simulation, we compared the worst case MDSV bound for different scrambling polynomial and control bit sizes. We find that careful selection of scrambling polynomial and control bit size are important factor to guarantee the worst case MDSV performance.

• Journal of Computing Science and Engineering
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• v.1 no.1
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• pp.56-73
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• 2007

Demands have been growing in safety-critical application fields for producing networked real-time embedded computing (NREC) systems together with acceptable assurances of tight service time bounds (STBs). Here a service time can be defined as the amount of time that the NREC system could take in accepting a request, executing an appropriate service method, and returning a valid result. Enabling systematic composition of large-scale NREC systems with STB certifications has been recognized as a highly desirable goal by the research community for many years. An appealing approach for pursuing such a goal is to establish a hard-real-time (HRT) component model that contains its own STB as an integral part. The TMO (Time-Triggered Message-Triggered Object) programming scheme is one HRT distributed computing (DC) component model established by the first co-author and his collaborators over the past 15 years. The TMO programming scheme has been intended to be an advanced high-level RT DC programming scheme that enables development of NREC systems and validation of tight STBs of such systems with efforts far smaller than those required when any existing lower-level RT DC programming scheme is used. An additional goal is to enable maximum exploitation of concurrency without damaging any major structuring and execution approaches adopted for meeting the first two goals. A number of previously untried program structuring approaches and execution rules were adopted from the early development stage of the TMO scheme. This paper presents new concrete justifications for those approaches and rules, and also discusses new extensions of the TMO scheme intended to enable further exploitation of concurrency in NREC system design and programming.

• Journal of the Korea Society of Computer and Information
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• v.18 no.10
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• pp.97-107
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• 2013

The latest programming paradigm has been mostly geared toward object-oriented programming and visual programming based on the object-oriented programming. However, object-oriented programming has a more difficult and complicated concept compared with that of existing structural programming technique; thus it has been very difficult to educate students in the IT-related department. This study designed and implemented a Java robot training kit in which the Java virtual machine is built so that it may enhance the desire and motivation of students for learning the object-oriented programming using the training kit which is possible to attach various input and output devices and to control a robot. The developed Java robot training kit is able to communicate with a computer through the USB interface, and it also enables learners to manufacture a robot for education and to practice applied programming because there is a general purpose input and output port inside the kit, through which diverse input and output devices, DC motor, and servo motor can be operated. Accordingly, facing the IT fusion era, the wall between the academic circles and the major becomes lower and the need for introducing education about creative engineering object-oriented programming language is emerging. At this point, the Java robot training kit developed in this study is expected to make a great commitment in this regard.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.3
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• pp.357-364
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• 2015

This research presents a DC-DC converter controller implemented with an analog memory. The structure of the converter will contribute to solve the stability problem unavoidable in a conventional closed loop converter. The analog memory will be used for realizing CAM(Contents Addressable Memory) which contains the output of the converter and the relevant duty ratio, respectively. The operation for reading in the memory is executed with an absolute differencing circuit and a WTA(Winner-Take-All) circuit suitable for a nearest-match function of the CAM. We also present a system architecture that enables highly-paralleled fast writing and quick readout as well as high integration density.

• Journal of the Korea Society of Computer and Information
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• v.26 no.1
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• pp.111-118
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• 2021

This paper proposes a novel method of caching contents that can be encoded into multiple quality levels in device-to-device (D2D)-assisted caching networks. Different from the existing caching schemes, the author allows caching fractions of an individual file and considers the self cache hit event, which the user can find the desired content in its device. The author analyzes the tradeoff between the quality of cached contents and the cache hit rate, and proposes the device caching method maximizing the expected quality that the user can enjoy. Depending on the parameter of the relationship between the quality and the file size, the optimal caching method can be obtained by solving the convex optimization problem and the DC programming problem. If the file size increases faster than the quality, the cached fractions of the contents continuously increase as the popularity grows. Meanwhile, if the file size increases slower than the quality, some of the high-popularity files are entirely cached but others are not cached at all.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.852-855
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• 2012

A DC-DC converter for EEPROM IPs which perfom erasing by the FN (Fowler-Nordheim) tunneling and programming by the band-to-band tunneling is designed in this paper. For the DC-DC converter for EEPROM IPs using a low voltage of $1.5V{\pm}10%$ as the logic voltage, a scheme of using VRD (Read Voltage) instead of VDD is proposed to reduce the pumping stages and pumping capacitances of its charge pump circuit. VRD ($=3.1V{\pm}0.1V$) is a regulated voltage by a voltage regulator using an external voltage of 5V. The designed DC-DC converter outputs VPP (=8V) and VNN (=-8V) in the write mode.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.3
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• pp.131-138
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• 1999

Generally, the digital controller has many advantages such as high precision, robustness to electrical noise, capability of flexible programming and fast response to the load variation. In this study, we have established proper mathematical equivalent model of Brushless DC (BLDC) motor and estimated the motor parameter by means of the back-emf measurement as being the step input to the controlled target BLDC motor. And the validity of proposed estimation method is confirmed by the test result of step response. As well, we have designed the reasonable digital controller as a consequence of the root locus method which is obtained from the open-loop transfer function of BLDC motor with hall sensor, and the determination of control gain for variable speed control. Here, revised Ziegler-Nichols tuning method is applied for the proper digital gain establishment, and the system stability is verified by the frequency domain analysis with Bode-plot and experimentation.

• Journal of the Korea Society of Computer and Information
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• v.21 no.3
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• pp.9-15
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• 2016

In this paper, DC-PLC typed one-wire controller was designed and manufactured especially for In-vehicle safe devices. One-wire by DC-PLC scheme is to be used as a power supply and ground to process the sensor data and to operate the vehicle actuators. To avoid complicate wires, we use the conventional wires without installing extra communication lines. The data collected from the sensors are transmitted to the main controller, processed by programming, and run the actuators corresponding to the commands sending to vehicle control board. The proposed method shows that only One-wire without requiring several wires make In-vehicle control devices simple and reduce the damage due to the loss of the wiring.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.1
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• pp.48-56
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• 2012

This paper deals with power electronic converter education program using LabVIEW. LabVIEW is a graphic based programming language with easy debugging, which is suitable for education program that can be used to study and figure out the operation of power electronic converters. When LabVIEW is employed as a simulation program of the operation of power electronic converters, the resulting program has the advantage such that the effects of the change of control variables and circuit parameters on the various variables such as the output voltage and the inductor current etc can be directly displayed without any separate compiling procedure. This paper shows the design procedure and the characteristics of the power electronics education program implemented by LabVIEW focusing on DC-DC converter among power electronic converters.