• Title/Summary/Keyword: DC current measurement

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Analysis of the Threshold Voltage Instability of Bottom-Gated ZnO TFTs with Low-Frequency Noise Measurements (Low-Frequency Noise 측정을 통한 Bottom-Gated ZnO TFT의 문턱전압 불안정성 연구)

  • Jeong, Kwang-Seok;Kim, Young-Su;Park, Jeong-Gyu;Yang, Seung-Dong;Kim, Yu-Mi;Yun, Ho-Jin;Han, In-Shik;Lee, Hi-Deok;Lee, Ga-Won
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.7
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    • pp.545-549
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    • 2010
  • Low-frequency noise (1/f noise) has been measured in order to analyze the Vth instability of ZnO TFTs having two different active layer thicknesses of 40 nm and 80 nm. Under electrical stress, it was found that the TFTs with the active layer thickness of 80 nm shows smaller threshold voltage shift (${\Delta}V_{th}$) than those with thickness of 40 nm. However the ${\Delta}V_{th}$ is completely relaxed after the removal of DC stress. In order to investigate the cause of this threshold voltage instability, we accomplished the 1/f noise measurement and found that ZnO TFTs exposed the mobility fluctuation properties, in which the noise level increases as the gate bias rises and the normalized drain current noise level($S_{ID}/{I_D}^2$) of the active layer of thickness 80 nm is smaller than that of active layer thickness of thickness 40 nm. This result means that the 80 nm thickness TFTs have a smaller density of traps. This result correlated with the physical characteristics analysis performmed using XRD, which indicated that the grain size increases when the active layer thickness is made thicker. Consequently, the number of preexisting traps in the device increases with decreasing thickness of the active layer and are related closely to the $V_{th}$ instability under electrical stress.

Influence of Gd0.1Ce0.9O2-δ Interlayer between La0.6Sr0.4Co0.2Fe0.8O3-δ Cathode and Sc-doped Zirconia Electrolyte on the Electrochemical Performance of Solid Oxide Fuel Cells (La0.6Sr0.4Co0.2Fe0.8O3-δ 공기극과 Sc이 도핑된 지르코니아 전해질 사이에 삽입한 Gd0.1Ce0.9O2-δ 중간층이 고체산화물 연료전지의 전기화학적 성능에 미치는 영향)

  • Lim, Jinhyuk;Jung, Hwa Young;Jung, Hun-Gi;Ji, Ho-Il;Lee, Jong-Ho
    • Ceramist
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    • v.21 no.4
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    • pp.378-387
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    • 2018
  • The optimal fabrication conditions for $Gd_{0.1}Ce_{0.9}O_{2-{\delta}}$(GDC) buffer layer and $La_{0.6}Sr_{0.4}Co_{0.2}Fe_{0.8}O_{3-{\delta}}$ (LSCF) cathode on 1mol% $CeO_2-10mol%\;Sc_2O_3$ stabilized $ZrO_2$ (CeScSZ) electrolyte were investigated for application of IT-SOFCs. GDC buffer layer was used in order to prevent undesired chemical reactions between LSCF and CeScSZ. These experiments were carried out with $5{\times}5cm^2$ anode supported unit cells to investigate the tendencies of electrochemical performance, Microstructure development and interface reaction between LSCF/GDC/CeScSZ along with the variations of GDC buffer layer thickness, sintering temperatures of GDC and LSCF were checked, respectively. Electrochemical performance was analyzed by DC current-voltage measurement and AC impedance spectroscopy. Microstructure and interface reaction were investigated by scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS). Although the interfacial reaction between these materials could not be perfectly inhibited, We found that the cell, in which $6{\mu}m$ GDC interlayer sintered at $1200^{\circ}C$ and LSCF sintered at $1000^{\circ}C$ were applied, showed good interfacial adhesions and effective suppression of Sr, thereby resulting in fairly good performance with power density of $0.71W/cm^2$ at $800^{\circ}C$ and 0.7V.