• Title/Summary/Keyword: DC 송전

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The Development Status of Power Conversion Technology for Power Grid (전력계통용 전력변환기술 개발 현황)

  • Lee, Eun-Jae;Baek, Seung-Taek;Choi, Ho-Seok;Kim, Young-Woo;Shim, Jae-Hyeok;Song, Sang-Wook
    • Proceedings of the KIPE Conference
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    • 2019.07a
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    • pp.551-554
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    • 2019
  • 국내 전력 계통은 경제의 성장과 더불어 생활 수준의 향상에 따라 지속적인 증설과 발전이 이루어졌다. 전력설비의 밀도 측면에서 비추어보면 미국이나 일본 대비 적게는 2배에서 많게는 4배에 이르는 최고 수준의 설비 밀도를 보이고 있다. 또한 전체 전력 생산량의 40%이상이 수도권에서 소비되고 있지만 발전설비는 최대 전력 수요지인 수도권과 먼 해안에 인접한 지역에 편재되어 있기 때문에 발생하는 수요와 공급지의 불균형, 장거리 선로를 통한 전력 전송에서 야기되는 전력계통 운영 측면에서의 문제가 발생하게 된다. 최근 화두가 되고 있는 원전 축소, 노후 화력 발전소 정지, 송전선로 경과지에서의 건설 고압 송전선로 건설 반대 등의 요인으로 인하여 전력계통을 최대한 효율적이고 안정적으로 운영하여야 하는 대전제를 만족시키기 위한 방안으로 기존 AC 기반의 계통 설비에 전력변환기술을 기반으로 하는 DC 계통 및 FACTS 설비의 확대 적용하는 방안이 제시되고 있다. 본 논문에서는 다가올 MV급 이상의 전력변환설비의 개념 및 개발 현황에 대한 소개를 하고자 한다.

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A Study on Advanced Fault Locating for Short Fault of a Double Circuit Transmission Line (병행 2회선 송전선로의 선간단락시 고장점 표정의 개선에 관한 연구)

  • Park, Yu-Yeong;Park, Chul-Won
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.30 no.1
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    • pp.28-37
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    • 2016
  • Fault locating is an important element to minimize the damage of power system. The computation error of fault locator may occur by the influence of the DC offset component during phasor extraction. In order to minimize the bad effects of DC offset component, this paper presents an improved fault location algorithm based on a DC offset removal filter for short fault in a double circuit transmission line. We have modeled a 154kV double circuit transmission line by the ATP software to demonstrate the effectiveness of the proposed fault locating algorithm. The line to line short faults were simulated and then collected simulation data was used. It can be seen that the error rate of fault locating estimation by the proposed algorithm decreases than the error rate of fault locating estimation by conventional algorithm.

Control System Design for Self-Commutated Static Var Compensator (전압원인버터방식 송전용 무효전력보상기의 제어시스템 설계)

  • 한병문
    • Proceedings of the KIPE Conference
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    • 1996.06a
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    • pp.89-92
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    • 1996
  • This paper describes a detailed simulation model of the static condenser (STATCON) to analyze the dynamic interaction with the ac transmission line. The static condenser was represented by a 12-pulse voltage-source inverter sharing an energy storage dc capacitor. The voltage-source inverter consists of two 6-pulse bridges modeled with ideal gate-turn-off switches. The control system for the static condenser was designed through a mathematical model deduced from the equivalent circuit. Simulation results show that the conceived model is very effective to analyze the dynamic interaction between the static condenser and the ac transmission system.

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Power network Optimal Operation using SMART Link (SMART Link를 이용한 전력계통 최적화 운영)

  • Kim, Chan-Ki;Lee, Jung-Suk;Kwak, No-Hong;Chang, Jae-Won;Won, Young-Jin
    • Proceedings of the KIEE Conference
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    • 2008.11a
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    • pp.40-43
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    • 2008
  • 본 논문은 AC계통에 DC계통을 중첩하여 계통의 안정도를 극대화 하는 새로운 방안(본 논문에서는 SMART Link로 명명)을 제시하였다. 제안된 방식은 경계적인 관점에서 기존의 송전선로를 이용하는 방법을 제시하였고, 대규모 환상망에서 발생하는 고장전류를 저감하는 방법을 논하였다. 그리고, SMART Link의 문제점과 이에 대한 해결 방식을 제시하여 실제 적용 가능한 계통망을 제시하였다.

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Design of PID Controller using Immune Algorithm for AC-DC Power System (교류-직류시스템의 안정화를 위한 면역알고리즘을 이용한 최적 PID 제어기 설계)

  • 정현화;허동렬;이정필;정형환
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2001.05a
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    • pp.225-230
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    • 2001
  • In this paper, a method for optimal design of PID controller using the immune algorithm(IA) has been proposed to improve the stability of A.C.-D.C. power system. The process of this study is composed of formulation of basic controls on HVDC transmission system, mathematical model preparation for stability analysis, and supplementary signal control by an optimal PID controller using the IA. The dynamic property was verified through computer simulations regarding transient stability.

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A Study on Digital Fault Locator for Transmission Line (송전선로용 디지털 고장점 표정장치에 관한 연구)

  • Lee, Kyung-Min;Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.64 no.4
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    • pp.291-296
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    • 2015
  • Transmission line is exposed to a large area, and then faults are likely to occur than the other component of power system. When a fault occurs on a transmission line, fault locator helps fast recovery of power supply on power system. This paper deals with the design of a digital fault locator for improvement accuracy of the fault distance estimation and a fault occurrence position for transmission line. The algorithm of a fault locator uses a DC offset removal filter and DFT filter. The algorithm utilizes a fault data of GPS time synchronized. The computed fault information is transmitted to the other side substation through communication. The digital fault locator includes MPU module, ADPU module, SIU module, and a power module. The MMI firmware and software of the fault locator was implemented.

A Study on Fault Detection for Transmission Line using Discrete Daubechies Wavelet Transform (이산 Daubechies 웨이브릿 변환을 이용한 송전선로의 고장검출)

  • Lee, Kyung-Min;Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.66 no.1
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    • pp.27-32
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    • 2017
  • This paper presents a Daubechies wavelet-based fault detection method for fault identification in transmission lines. After the Daubechies wavelet coefficients are calculated, the proposed algorithm has been implemented difference equation using C language. We have modeled a 154kV transmission line using the ATPDraw software and have acquired test data. In order to evaluate effects of DC offset, simulations carried out while varying an inception angle of the voltage $0^{\circ}$, $45^{\circ}$, $90^{\circ}$. For performance evaluation, fault distance was varied. As we can see from the off-line simulation, the proposed algorithm shows rapid and accurate fault detection. Also we can see the proposed algorithm is not affected by the fault inception angle change.

Analysis of HVDC transmission with parallel AC systems using PACAD/EMTDC (PSCAD/EMTDC를 이용한 HVDC, AC 병행 송전선로 계통해석)

  • Lee, Sangmin;Yoo, Yeuntae;Kim, Hyunwook;Jang, Gilsoo
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.217-218
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    • 2015
  • This paper presents an anaysis of parallel operated HVDC and AC transmissions' transient stability and control analysis by using PACAD/EMTDC program. We measured and analyzed power trasfer in case of various operating conditions including ac, dc faults to find an effects to the power system of the operating conditions. In this project, Simulation of ac/dc parallel system that maximize margins of the ac system and allow a higher power transfer is performed and analyzed.

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A distance Relaying Algorithm Based on Numerical Solution of a Differential Equation for Transmission Line Protection (송전선 보호용 적분근사 거리계전 알고리즘)

  • 조경래;정병태;홍준희;박종근
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.43 no.5
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    • pp.711-720
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    • 1994
  • A distance relaying algorithm for detecting faults at power transmission line is presented in this paper. The algorithm is based on differential equation from relaton between voltage and current, which is composed of lumped resistance and inductance. During the fault transient state,the voltage and current signals are severely distorted due to the exponentially decaying DC offset and high frequency components, In spite of using small data, the presented integral method to evaluate R and L from voltage and current has high performance against these harmonics including DC offset. Therefore, the presented algorithm can be implemented with only a low order anti-aliasing analog filter and dosen't need any digital filter to remove specific components.

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Device Feature and Application Status for Light Triggering Thyristor(LTT) in HVDC Transmission (HVDC 송전용 광구동 사이리스터(LTT)를 위한 소자특성 및 응용의 요구)

  • Zhang, C.L.;Kim, S.C.;Kim, E.D.;Kim, H.W.;Seo, K.S.;Bhang, W.;Cheong, K.Y.;Kim, N.K.;Luo, J.Q.;Bai, J.B.;Wang, X.B.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.397-400
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    • 2004
  • The design concept for 8kV light triggering thyristor(LTT) with integrated BOD was discussed here in detail. The trade-off between light triggering input source againsthigh dV/dt limitation has been treated via grooved P-base for gate design. The main application point used for high voltage DC transmission(HVDC) was represented.

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