• Journal of Power Electronics
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• v.18 no.2
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• pp.418-431
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• 2018

This paper presents a new asymmetrical multilevel inverter with a reduced number of power electronic components. The proposed multilevel inverter is analyzed using two different configurations: i) First Configuration (with a switched diode) and ii) Second Configuration (without a switched diode). The presented topologies are compared with recent multilevel inverter topologies in terms of number of switches, gate driver circuits and blocking voltages. The proposed topologies can be cascaded to generate the maximum number of output voltage levels and they are suitable for high voltage applications. Various power quality issues are addressed for both of the configurations. The proposed 11-level inverter configuration is simulated using MATLAB and it is validated with a laboratory based experimental setup.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.5
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• pp.409-415
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• 2012

This paper presents a new software-based on-line dead-time compensation technique for a single-phase grid-connected photovoltaic (PV) inverter system. To prevent a short circuit in the inverter arms, a switching delay time must be inserted in the pulse width modulation (PWM) signals. This causes the dead-time effect, which degrades the system performance around zero-crossing point of the output current. To reduce the dead-time effect around the zero-crossing point of grid current, a harmonic mitigation of grid current is used as an additional part of the synchronous frame current control scheme. This additional task mitigates the harmonic components caused by the dead-time from the grid current. Simulation and experimental results are shown to verify the effectiveness of the proposed dead-time compensation method in the single-phase grid-connected inverter system.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.634-637
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• 1997

This paper is on the research and development of new SIV(Static Inverter) using IGBT(Insulated Gate Bipolar Transistor) semiconductor for a wide range of electric railway applications. For the simplification and higher controllability, the direct PWM control method with 3level inverter topology was adopted. In the new SIV system, the cost as well as bulk and weight was appreciably reduced about 40% lower than those of conventional SIV, the electrical efficiency was increased above 95% and the audible noise level was less than 65dB. In addition, the THD(Total Harmonic Distortion) factor was below 5% and the voltage fluctuation on a transient state was below 10%.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.750-753
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• 2002

A novel single-stage half-bridge high frequency resonant inverter using ZVS(Zero Voltage Switching) with high input power factor suitable for induction heating applications is presented in this paper. The proposed high frequency resonant Inverter integrates half-bridge boost rectifier as power factor corrector(PFC) and half-bridge resonant inverter into a single stage. The input stage of the half-bridge boost rectifier is working in discontinuous conduction mode (DCM) with constant duty cycle and variable switching frequency. Simulation results through the Pspice have demonstrated the feasibility of the proposed inverter. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications, DC-DC converter etc.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.11
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• pp.1628-1632
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• 2013

HEP(Head Electric Power) system, supplying 3-phase service power to the coach vehicles, is a kind of special auxiliary power equipment which is boarded on 8200 series electric locomotives in KORAIL. This equipment shares high voltage DC link with a main propulsion converter/inverter systems. It was difficult to use high frequency PWM technique so that GTO has been used as a power device same like the main power system. Due to low PWM frequency(300Hz) of HEP inverter, the output voltage has less power quality comparing to normal SIV(Static Inverter) system. In this paper, an optimal PWM strategy is presented for new IGBT type HEP inverter system. Several PWM techniques were investigated to improve output voltage quality under fixed lower filter inductance and not high PWM frequency. Finally PC simulations have been done to clarify its availability.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.1-9
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• 2006

In this paper, a couple of 10Gb/s transimpedance amplifiers are realized in a 0.18um standard CMOS technology for optical communication applications. First, the voltage-mode inverter TIA(I-TIA) exploits inverter input configuration to achieve larger effective gm, thus reducing the input impedance and increasing the bandwidth. I-TIA demonstrates $56dB{\Omega}$ transimpedance gain, 14GHz bandwidth for 0.25pF photodiode capacitance, and -16.5dBm optical sensitivity for 0.5A/W responsivity, 9dB extinction ration and $10^{-12}$ BER. However, both its inherent parasitic capacitance and the package parasitics deteriorate the bandwidth significantly, thus mandating very judicious circuit design. Meanwhile, the current-mode RGC TIA incorporates the regulated cascade input configuration, and thus isolates the large input parasitic capacitance from the bandwidth determination more effectively than the voltage-mode TIA. Also, the parasitic components give much less impact on its bandwidth. RGC TIA provides $60dB{\Omega}$ transimpedance gain, 10GHz bandwidth for 0.25pF photodiode capacitance, and -15.7dBm optical sensitivity for 0.5A/W responsivity, 9dB extinction ration and $10^{-12}$ BER. Main drawback is the power dissipation which is 4.5 times larger than the I-TIA.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.638-641
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• 1997

This paper describes the electrical design, characteristic and test results of both VVVF Inverter system and a auxiliary power supply system for UTM-01. As the propulsion system for SLIMs, GTO type VVVF inverter is used. IGBT 3 level inverter is adopt in Auxiliary Power Supply system. The control of two systems is fully digitalized by DSP TMS320C31. So a performance of two systems is more improved.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.306-308
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• 1996

The demands of minimizing the reactive power and reducing the current harmonics are increasing nowdays. The inverter airconditioner needs high inductive power and it operates with wide load ranges. Conventionally, an huge LC passive filter is used in airconditioner to improve the power factor and to reduce current harmonics which doesn't give good results. In this paper, a design of active power factor correction(APFC)circuit for inverter airconditioner is described. To improve the P.F and reduce the current THD, average current controlled APFC is designed and tested. The problems of APFC implementation, their solution and testing results are described.

• Journal of Power Electronics
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• v.3 no.4
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• pp.205-214
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• 2003

This paper proposes a simple control strategy based on the discontinuous PWM (DPWM) to balance the DC-link voltage of three-level neutral-point-clamped (NPC) inverter at low modulation index. It introduces new DPWM methods in multi-level inverter and one of them is used for balancing the DC-link voltage. The current flowing in the neutral point of the DC-link causes the fluctuation of the DC-link voltage of the NPC inverter. The proposed DPWM method changes the path and duration time of the neutral point current, which makes the overall fluctuation of the DC-link voltage zero during a sampling time of the reference voltage vector. Therefore, by using the proposed strategy, the voltage of the DC-link can be balanced fairly well and the voltage ripple of the DC-link is also reduced significantly. Moreover, comparing with conventional methods which have to perform the complicated calculation, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by the experiment.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.5
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• pp.325-333
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• 2021

A 3 kW grid-tied PV inverter with Gallium nitride high-electron mobility transistor (GaN HEMT) for domestic commercialization was developed using boost converter and full-bridge inverter with LCL filter topology. Recently, many GaN HEMTs are manufactured as surface mount packages because of their lower parasitic inductance characteristic than standard TO (transistor outline) packages. A surface mount packaged GaN HEMT releases heat through either top or bottom cooling method. IGOT60R070D1 is selected as a key power semiconductor because it has a top cooling method and fairly low thermal resistances from junction to ambient. Its characteristics allow the design of a 3 kW inverter without forced convection, thereby providing great advantages in terms of easy maintenance and high reliability. 1EDF5673K is selected as a gate driver because its driving current and negative voltage output characteristics are highly optimized for IGOT60R070D1. An LCL filter with passive damping resistor is applied to attenuate the switching frequency harmonics to the grid-tied operation. The designed LCL filter parameters are validated with PSIM simulation. A prototype of 3 kW PV inverter with GaN HEMT is constructed to verify the performance of the power conversion system. It achieved high power density of 614 W/L and peak power efficiency of 99% for the boost converter and inverter.