• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.02a
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• pp.140-142
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• 2003

We have designed a SFQ (Single Flux Quantum) D2 Cell and Inverter(NOT) for a superconducting ALU (Arithmetic Logic Unit). To optimize the circuit, we have used Julia, XIC and Lmeter for simulations and layouts. We obtained the circuit margin of larger than $\pm$25%. After layout, we drew chip for fabrication of SFQ D2 Cell and Inverter. We connected D2 Cell and Inverter to jtl, DC/SFQ, SFQ/DC and RS flip-flop for measurement.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.2
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• pp.199-215
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• 1996

A new Class-D series-loaded resonant inverter topology which can minimize the influences of the stray inductances is presented. In the conventional Class-D inverters, the stray inductances not only result in the overvoltage which gives the switches voltage stresses, but also in the high frequency resonant currents during turn-off transients. The new Class-D inverter is superior to the conventional Class-D inverters with respect to minimization of the problems caused by the stray inductances and is more suitable for high power and high frequency inverter systems such as induction heating. The validity of the new Class-D inverter is verified by simulation and experimental results.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.308-310
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• 1995

Most of the elevator door controllers have been controlled by DC Motors as an actuator. Recently, The control system using AC induction motor and general purpose inverter has been applied to control of elevator door. But there are some difficulties in making use of this system, such as adjustment of door speed pattern, door open-close time, and security of passenger safety. In order to solve these problems, a special inverter has, been developed with an encoder feedback. From the result of field-test, we proved that a special inverter with encoder feedback device has come to considerable effect. Until now about 1,200 sets of these inverters are operated in Korea and about 100 sets are operated in South-east Asia.

• Journal of electromagnetic engineering and science
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• v.11 no.2
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• pp.83-90
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• 2011

In this paper, we present the design method for a low-pass type inverter, which can effectively suppress the spurious response associated with band-pass filters. The inverter has a length of ${\lambda}/4$ and employs not only a stepped-impedance configuration but also asymmetrical and bending structures in order to improve frequency selectivity and compactness. The inverter is applied as an impedance/admittance inverter to the ultra-wideband (UWB) band-pass filter. The UWB band-pass filter configuration is based on a stub band-pass filter consisting of quarter-wavelength impedance inverters and shunt short-circuited stubs ${\lambda}/4$ in length. The asymmetrical stepped-impedance low-pass type inverter improves not only the spurious responses, but also the return loss characteristics associated with a UWB band-pass filter, while a compact size is maintained. The UWB band-pass filter using the proposed inverters is fabricated and tested. The measured results show excellent attenuation characteristics at out-band frequencies, which exceed 18 dB up to 39 GHz. The insertion loss within the pass-band (from 3.1 to 10.6 GHz) is below 1.7 dB, the return loss is below 10 dB, and the group delay is below 1 ns.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.475-478
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• 2001

In performing the three-level SVPWM, it is nearly impossible to control the neutral-point potential exactly to the half of the dc-link voltage at all times. Therefore the inverter would produce an erroneous output voltage by this voltage unbalance. So the voltage unbalance has to be compensated in doing PWM, when the voltage unbalance occurs whether it is small or large, to make the inverter output voltage follow the reference voltage exactly the same. In this paper, a new compensating method for the neutral-point potential variation in a three-level inverter space vector PWM (SVPWM) is presented. By using the proposed method, the output voltage of the inverter can be made same as the reference voltage and thus the current and torque ripple of the inverter driven motor can be greatly improved even if the voltage unbalance is quite large. The proposed method is verified experimentally with a 3-level IGBT inverter.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1582-1590
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• 2019

A new method for reducing the common-mode current generated by the voltage variations in a two-inverter air conditioner system by applying a synchronized pulse-width modulation (PWM) strategy is proposed. The PWM signals of the master-mode inverter are generated based on the reference voltage, while those of the slave-mode inverter are output in the opposite direction when the master-mode inverter changes its switching state. However, the slave-mode control results in a mismatch between the reference voltage and the actual output voltage that is modified by synchronized control operation. The proposed method is capable of reducing and controlling this voltage error by performing signal selection in the vector space of the slave-mode inverter, which mitigates the distortion of the phase current. The efficacy of this method in reducing conducted emissions has been validated both theoretically and experimentally.

• Journal of Power Electronics
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• v.12 no.5
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• pp.699-707
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• 2012

This paper proposes a single-stage half-bridge electronic ballast with a high power factor using only a single coupled inductor. Compared to conventional high power factor electronic ballasts, the proposed ballast is a simpler circuit with a low cost and a high reliability. The proposed ballast is made up of a power-factor-correction (PFC) circuit and a self-oscillating class-D inverter. The PFC and inverter stages of the proposed ballast are simplified by sharing only a single coupled inductor and two common switches. The proposed PFC circuit can achieve a high power factor and low voltage stresses of the switches. A saturable transformer in the self-oscillating class-D inverter determines the switching frequency of the ballast. Experimental results obtained on a 30W fluorescent lamp are discussed.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.5
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• pp.335-342
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• 2022

In this paper, a single-bit 3rd-order feedforward delta sigma modulator is proposed for audio applications. The proposed modulator is based on a class-C inverter for low voltage and power applications. For the high-precision requirement, the class-C inverter with regulated cascode structure increases its DC gain and acts as a low-voltage subthreshold amplifier. The proposed Class-C inverter-based modulator is designed and simulated in 180-nm CMOS process. With no performance loss and a low supply voltage compatibility, the proposed class-C inverter-based switched-capacitor modulator achieves high power efficiency. This design achieves an signal-to-noise-and-distortion ratio (SNDR) of 93.9 dB, an signal-to-noise ratio (SNR) of 108 dB, an spurious-free dynamic range (SFDR) of 102 dB, and a dynamic range (DR) of 102 dB at a signal bandwidth of 20 kHz and a sampling frequency of 4 MHz, while only using 280 μW of power consumption from a 0.8-V power supply.

• Progress in Superconductivity
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• v.5 no.1
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• pp.17-20
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• 2003

We have designed and measured a SFQ(Single Flux Quantum) DFFC and an Inverter(NOT) for superconducting ALU(Arithmetic Logic Unit) development. To optimize the circuit, we used Julia, XIC, and L meter for circuit simulations and circuit layouts. The Inverter was consisted of a D Flip-Flop, a data input, a clock input and a data output. If a data pulse arrives at the inverter, then the output reads ‘0’ (no output pulse is produced) at the next clock period. If there is no input data pulse, it reads out ‘1’(output pulse is produced). The DFFC was consisted of a D flip-Flop, an Inverter, a Data in, a Clock in and two outputs. If a data pulse arrives at the DFFC circuit, then the output2 reads ‘1’ at the next clock period, otherwise it reads out ‘1’ to output1. Operation of the fabricated chip was performed at the liquid helium temperature and at the frequencies of 1KHz.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.128-130
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• 2006

We introduce 2[MVA] 3300[V] 7-level voltage source inverter system developed by POSCON and describe the main characteristics of inverter system i.e. PWM converter, H-bridge power module, phase shifted carrier PWM The PWM converter is a three-phase boost converter, which operates in a 4-quadrant and in a nearly unit displacement power factor. Experimental waveforms are also presented to verify the proposed method and performance of the developed system.